The internal clock of the master chip, which is usually 125MHz, is only half
(62.5MHz) for the slave chips. So we have to adjust the uartclk for all the
slave ports. Therefor we add a new function to determine if a slave chip is
present and update pci_xr17v35x_setup accordingly.

Signed-off-by: Soeren Grunewald <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>
---
 drivers/tty/serial/8250/8250_pci.c | 22 +++++++++++++++++++---
 1 file changed, 19 insertions(+), 3 deletions(-)

diff --git a/drivers/tty/serial/8250/8250_pci.c 
b/drivers/tty/serial/8250/8250_pci.c
index eb8adc2..46ddce4 100644
--- a/drivers/tty/serial/8250/8250_pci.c
+++ b/drivers/tty/serial/8250/8250_pci.c
@@ -1823,6 +1823,9 @@ static int pci_eg20t_init(struct pci_dev *dev)
 #endif
 }
 
+#define PCI_DEVICE_ID_EXAR_XR17V4358   0x4358
+#define PCI_DEVICE_ID_EXAR_XR17V8358   0x8358
+
 static int
 pci_xr17c154_setup(struct serial_private *priv,
                  const struct pciserial_board *board,
@@ -1832,6 +1835,15 @@ pci_xr17c154_setup(struct serial_private *priv,
        return pci_default_setup(priv, board, port, idx);
 }
 
+static inline int
+xr17v35x_has_slave(struct serial_private *priv)
+{
+       const int dev_id = priv->dev->device;
+
+       return ((dev_id == PCI_DEVICE_ID_EXAR_XR17V4358) ||
+               (dev_id == PCI_DEVICE_ID_EXAR_XR17V8358));
+}
+
 static int
 pci_xr17v35x_setup(struct serial_private *priv,
                  const struct pciserial_board *board,
@@ -1846,6 +1858,13 @@ pci_xr17v35x_setup(struct serial_private *priv,
        port->port.flags |= UPF_EXAR_EFR;
 
        /*
+        * Setup the uart clock for the devices on expansion slot to
+        * half the clock speed of the main chip (which is 125MHz)
+        */
+       if (xr17v35x_has_slave(priv) && idx >= 8)
+               port->port.uartclk = (7812500 * 16 / 2);
+
+       /*
         * Setup Multipurpose Input/Output pins.
         */
        if (idx == 0) {
@@ -1998,9 +2017,6 @@ pci_wch_ch38x_setup(struct serial_private *priv,
 #define PCIE_DEVICE_ID_WCH_CH382_2S1P  0x3250
 #define PCIE_DEVICE_ID_WCH_CH384_4S    0x3470
 
-#define PCI_DEVICE_ID_EXAR_XR17V4358   0x4358
-#define PCI_DEVICE_ID_EXAR_XR17V8358   0x8358
-
 #define PCI_VENDOR_ID_PERICOM                  0x12D8
 #define PCI_DEVICE_ID_PERICOM_PI7C9X7951       0x7951
 #define PCI_DEVICE_ID_PERICOM_PI7C9X7952       0x7952
-- 
2.4.3

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