commit: a32826e4aefa905b392d2d862d51365d50d4829b
From: Stephen Warren <[email protected]>
Date: Thu, 6 Sep 2012 17:47:33 -0600
Subject: ASoC: tegra: fix maxburst settings in dmaengine code

The I2S controllers are programmed with an "attention" level of 4 DWORDs.
This must match the configuration passed to the DMA driver, so that when
they burst in data, they don't overflow the available FIFO space. Also,
the burst size is relevant to the destination for playback, and source
for capture, not vice-versa as originally written.

Signed-off-by: Stephen Warren <[email protected]>
Signed-off-by: Mark Brown <[email protected]>
Cc: [email protected]
---
 sound/soc/tegra/tegra_pcm.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/sound/soc/tegra/tegra_pcm.c b/sound/soc/tegra/tegra_pcm.c
index 5658bce..8d6900c 100644
--- a/sound/soc/tegra/tegra_pcm.c
+++ b/sound/soc/tegra/tegra_pcm.c
@@ -334,11 +334,11 @@ static int tegra_pcm_hw_params(struct snd_pcm_substream 
*substream,
        if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
                slave_config.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
                slave_config.dst_addr = dmap->addr;
-               slave_config.src_maxburst = 0;
+               slave_config.dst_maxburst = 4;
        } else {
                slave_config.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
                slave_config.src_addr = dmap->addr;
-               slave_config.dst_maxburst = 0;
+               slave_config.src_maxburst = 4;
        }
        slave_config.slave_id = dmap->req_sel;
 
-- 
1.7.3.4
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