This is a note to let you know that I've just added the patch titled
ARM: 7532/1: decompressor: reset SCTLR.TRE for VMSA ARMv7 cores
to the 3.4-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
arm-7532-1-decompressor-reset-sctlr.tre-for-vmsa-armv7-cores.patch
and it can be found in the queue-3.4 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <[email protected]> know about it.
>From e1e5b7e4251c7538ca08c2c5545b0c2fbd8a6635 Mon Sep 17 00:00:00 2001
From: Matthew Leach <[email protected]>
Date: Tue, 11 Sep 2012 17:56:57 +0100
Subject: ARM: 7532/1: decompressor: reset SCTLR.TRE for VMSA ARMv7 cores
From: Matthew Leach <[email protected]>
commit e1e5b7e4251c7538ca08c2c5545b0c2fbd8a6635 upstream.
This patch zeroes the SCTLR.TRE bit prior to setting the mapping as
cacheable for ARMv7 cores in the decompressor, ensuring that the
memory region attributes are obtained from the C and B bits, not from
the page tables.
Cc: Nicolas Pitre <[email protected]>
Reviewed-by: Will Deacon <[email protected]>
Signed-off-by: Matthew Leach <[email protected]>
Signed-off-by: Will Deacon <[email protected]>
Signed-off-by: Russell King <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>
---
arch/arm/boot/compressed/head.S | 1 +
1 file changed, 1 insertion(+)
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -648,6 +648,7 @@ __armv7_mmu_cache_on:
mcrne p15, 0, r0, c8, c7, 0 @ flush I,D TLBs
#endif
mrc p15, 0, r0, c1, c0, 0 @ read control reg
+ bic r0, r0, #1 << 28 @ clear SCTLR.TRE
orr r0, r0, #0x5000 @ I-cache enable, RR cache
replacement
orr r0, r0, #0x003c @ write buffer
#ifdef CONFIG_MMU
Patches currently in stable-queue which might be from [email protected] are
queue-3.4/arm-7532-1-decompressor-reset-sctlr.tre-for-vmsa-armv7-cores.patch
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