I seem to suck a bit at properly tagging stuff cc: stable ... thanks
for going through these. Acked.

Btw, I think it's quicker if you just supply a shortlog of all the
patches I've missed, then I can quickly go through them and mass-ack
them ;-)
-Daniel

On Tue, Jan 15, 2013 at 8:49 AM, CAI Qian <[email protected]> wrote:
> Daniel, this patch fixed the compilation error by transparently
> applied f20e0b08b8b2a8432e6abf3683960099f0ab2958 (drm/i915: Prefer
> CRTC 'active' rather than 'enabled' during WM computations) first.
> Then, this upstream commit is totally cancelled out the above one
> and applied successfully. Please ACK/NAK it if possible.
>
> Regards,
> CAI Qian
>
> From 3490ea5de6ac4af309c3df8a26a5cca61306334c Mon Sep 17 00:00:00 2001
> From: Chris Wilson <[email protected]>
> Date: Mon, 7 Jan 2013 10:11:40 +0000
> Subject: [PATCH] drm/i915: Treat crtc->mode.clock == 0 as disabled
>
> Prevent a divide-by-zero by consistently treating an 'active' CRTC
> without a mode set as actually disabled.
>
> This looks to have been first introduced with
>
> commit 24929352481f085c5f85d4d4cbc919ddf106d381
> Author: Daniel Vetter <[email protected]>
> Date:   Mon Jul 2 20:28:59 2012 +0200
>
>     drm/i915: read out the modeset hw state at load and resume time
>
> but then combined with
>
> commit b0a2658acb5bf9ca86b4aab011b7106de3af0add
> Author: Daniel Vetter <[email protected]>
> Date:   Tue Dec 18 09:37:54 2012 +0100
>
>     drm/i915: don't disable disconnected outputs
>
> it finally started oopsing.
>
> Signed-off-by: Chris Wilson <[email protected]>
> Reported-and-tested-by: Alexey Zaytsev <[email protected]>
> Tested-by: Sedat Dilek <[email protected]>
> Cc: Daniel Vetter <[email protected]>
> Cc: Jesse Barnes <[email protected]>
> Cc: [email protected]
> Signed-off-by: Daniel Vetter <[email protected]>
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 442968f..eaaff3c 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -44,6 +44,14 @@
>   * i915.i915_enable_fbc parameter
>   */
>
> +static bool intel_crtc_active(struct drm_crtc *crtc)
> +{
> +       /* Be paranoid as we can arrive here with only partial
> +        * state retrieved from the hardware during setup.
> +        */
> +       return to_intel_crtc(crtc)->active && crtc->fb && crtc->mode.clock;
> +}
> +
>  static void i8xx_disable_fbc(struct drm_device *dev)
>  {
>         struct drm_i915_private *dev_priv = dev->dev_private;
> @@ -405,9 +413,8 @@ void intel_update_fbc(struct drm_device *dev)
>          *   - going to an unsupported config (interlace, pixel multiply, 
> etc.)
>          */
>         list_for_each_entry(tmp_crtc, &dev->mode_config.crtc_list, head) {
> -               if (tmp_crtc->enabled &&
> -                   !to_intel_crtc(tmp_crtc)->primary_disabled &&
> -                   tmp_crtc->fb) {
> +               if (intel_crtc_active(tmp_crtc) &&
> +                   !to_intel_crtc(tmp_crtc)->primary_disabled) {
>                         if (crtc) {
>                                 DRM_DEBUG_KMS("more than one pipe active, 
> disabling compression\n");
>                                 dev_priv->no_fbc_reason = FBC_MULTIPLE_PIPES;
> @@ -992,7 +999,7 @@ static struct drm_crtc *single_enabled_crtc(struct 
> drm_device *dev)
>         struct drm_crtc *crtc, *enabled = NULL;
>
>         list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
> -               if (crtc->enabled && crtc->fb) {
> +               if (intel_crtc_active(crtc)) {
>                         if (enabled)
>                                 return NULL;
>                         enabled = crtc;
> @@ -1086,7 +1093,7 @@ static bool g4x_compute_wm0(struct drm_device *dev,
>         int entries, tlb_miss;
>
>         crtc = intel_get_crtc_for_plane(dev, plane);
> -       if (crtc->fb == NULL || !crtc->enabled) {
> +       if (!intel_crtc_active(crtc)) {
>                 *cursor_wm = cursor->guard_size;
>                 *plane_wm = display->guard_size;
>                 return false;
> @@ -1215,7 +1222,7 @@ static bool vlv_compute_drain_latency(struct drm_device 
> *dev,
>         int entries;
>
>         crtc = intel_get_crtc_for_plane(dev, plane);
> -       if (crtc->fb == NULL || !crtc->enabled)
> +       if (!intel_crtc_active(crtc))
>                 return false;
>
>         clock = crtc->mode.clock;       /* VESA DOT Clock */
> @@ -1478,7 +1485,7 @@ static void i9xx_update_wm(struct drm_device *dev)
>
>         fifo_size = dev_priv->display.get_fifo_size(dev, 1);
>         crtc = intel_get_crtc_for_plane(dev, 1);
> -       if (crtc->enabled && crtc->fb) {
> +       if (intel_crtc_active(crtc)) {
>                 planeb_wm = intel_calculate_wm(crtc->mode.clock,
>                                                wm_info, fifo_size,
>                                                crtc->fb->bits_per_pixel / 8,
> @@ -1923,7 +1930,7 @@ sandybridge_compute_sprite_wm(struct drm_device *dev, 
> int plane,
>         int entries, tlb_miss;
>
>         crtc = intel_get_crtc_for_plane(dev, plane);
> -       if (crtc->fb == NULL || !crtc->enabled) {
> +       if (!intel_crtc_active(crtc)) {
>                 *sprite_wm = display->guard_size;
>                 return false;
>         }



-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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