Acked. -Daniel On Tue, Jan 15, 2013 at 9:43 AM, CAI Qian <[email protected]> wrote: > Daniel, again this needs your ACK/NAK please. The original patch has > been modified slightly in order to apply for both 3.4.x and 3.7.x > stable kernels (does not affect 3.0.x). > > Regards, > CAI Qian > > From 539526b4137bc0e7a8806c38c8522f226814a0e6 Mon Sep 17 00:00:00 2001 > From: Daniel Vetter <[email protected]> > Date: Sat, 8 Dec 2012 12:58:33 +0100 > Subject: [PATCH] drm/i915: disable cpt phase pointer fdi rx workaround > > We've originally added this in > > commit 291427f5fdadec6e4be2924172e83588880e1539 > Author: Jesse Barnes <[email protected]> > Date: Fri Jul 29 12:42:37 2011 -0700 > > drm/i915: apply phase pointer override on SNB+ too > > and then copy-pasted it over to ivb/ppt. The w/a was originally added > for ilk/ibx in > > commit 5b2adf897146edeac6a1e438fb67b5a53dbbdf34 > Author: Jesse Barnes <[email protected]> > Date: Thu Oct 7 16:01:15 2010 -0700 > > drm/i915: add Ironlake clock gating workaround for FDI link training > > and fixed up a bit in > > commit 6f06ce184c765fd8d50669a8d12fdd566c920859 > Author: Jesse Barnes <[email protected]> > Date: Tue Jan 4 15:09:38 2011 -0800 > > drm/i915: set phase sync pointer override enable before setting phase > sync pointer > > It turns out that this w/a isn't actually required on cpt/ppt and > positively harmful on ivb/ppt when using fdi B/C links - it results in > a black screen occasionally, with seemingfully everything working as > it should. The only failure indication I've found in the hw is that > eventually (but not right after the modeset completes) a pipe underrun > is signalled. > > Big thanks to Arthur Runyan for all the ideas for registers to check > and changes to test, otherwise I couldn't ever have tracked this down! > > Cc: "Runyan, Arthur J" <[email protected]> > Cc: [email protected] > Reviewed-by: Jesse Barnes <[email protected]> > Signed-off-by: Daniel Vetter <[email protected]> > Signed-off-by: CAI Qian <[email protected]> > > diff --git a/drivers/gpu/drm/i915/intel_display.c > b/drivers/gpu/drm/i915/intel_display.c > index 08a9b13..4d3c7c6 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -2302,18 +2302,6 @@ static void intel_fdi_normal_train(struct drm_crtc > *crtc) > FDI_FE_ERRC_ENABLE); > } > > -static void cpt_phase_pointer_enable(struct drm_device *dev, int pipe) > -{ > - struct drm_i915_private *dev_priv = dev->dev_private; > - u32 flags = I915_READ(SOUTH_CHICKEN1); > - > - flags |= FDI_PHASE_SYNC_OVR(pipe); > - I915_WRITE(SOUTH_CHICKEN1, flags); /* once to unlock... */ > - flags |= FDI_PHASE_SYNC_EN(pipe); > - I915_WRITE(SOUTH_CHICKEN1, flags); /* then again to enable */ > - POSTING_READ(SOUTH_CHICKEN1); > -} > - > /* The FDI link training functions for ILK/Ibexpeak. */ > static void ironlake_fdi_link_train(struct drm_crtc *crtc) > { > @@ -2464,9 +2452,6 @@ static void gen6_fdi_link_train(struct drm_crtc *crtc) > POSTING_READ(reg); > udelay(150); > > - if (HAS_PCH_CPT(dev)) > - cpt_phase_pointer_enable(dev, pipe); > - > for (i = 0; i < 4; i++) { > reg = FDI_TX_CTL(pipe); > temp = I915_READ(reg); > @@ -2593,9 +2578,6 @@ static void ivb_manual_fdi_link_train(struct drm_crtc > *crtc) > POSTING_READ(reg); > udelay(150); > > - if (HAS_PCH_CPT(dev)) > - cpt_phase_pointer_enable(dev, pipe); > - > for (i = 0; i < 4; i++) { > reg = FDI_TX_CTL(pipe); > temp = I915_READ(reg); > @@ -2737,17 +2719,6 @@ static void ironlake_fdi_pll_disable(struct intel_crtc > *intel_crtc) > udelay(100); > } > > -static void cpt_phase_pointer_disable(struct drm_device *dev, int pipe) > -{ > - struct drm_i915_private *dev_priv = dev->dev_private; > - u32 flags = I915_READ(SOUTH_CHICKEN1); > - > - flags &= ~(FDI_PHASE_SYNC_EN(pipe)); > - I915_WRITE(SOUTH_CHICKEN1, flags); /* once to disable... */ > - flags &= ~(FDI_PHASE_SYNC_OVR(pipe)); > - I915_WRITE(SOUTH_CHICKEN1, flags); /* then again to lock */ > - POSTING_READ(SOUTH_CHICKEN1); > -} > static void ironlake_fdi_disable(struct drm_crtc *crtc) > { > struct drm_device *dev = crtc->dev; > @@ -2777,8 +2748,6 @@ static void ironlake_fdi_disable(struct drm_crtc *crtc) > I915_WRITE(FDI_RX_CHICKEN(pipe), > I915_READ(FDI_RX_CHICKEN(pipe) & > ~FDI_RX_PHASE_SYNC_POINTER_EN)); > - } else if (HAS_PCH_CPT(dev)) { > - cpt_phase_pointer_disable(dev, pipe); > } > > /* still set train pattern 1 */
-- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch -- To unsubscribe from this list: send the line "unsubscribe stable" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
