This is a note to let you know that I've just added the patch titled

    drm/i915: Unpin the flip target if we fail to queue the flip

to the 3.4-stable tree which can be found at:
    
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     0002-drm-i915-Unpin-the-flip-target-if-we-fail-to-queue-t.patch
and it can be found in the queue-3.4 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <[email protected]> know about it.


>From 5b6fd09a2834879518f22ed3ac6917a48ef4f15e Mon Sep 17 00:00:00 2001
From: Chris Wilson <[email protected]>
Date: Tue, 17 Apr 2012 19:35:53 +0100
Subject: drm/i915: Unpin the flip target if we fail to queue the flip

From: Chris Wilson <[email protected]>

commit 83d4092b0381e5dd6f312b2ec57121dcf0fcbade upstream.

Signed-off-by: Chris Wilson <[email protected]>
Cc: Jesse Barnes <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
Signed-off-by: Julien Cristau <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>
---
 drivers/gpu/drm/i915/intel_display.c |   50 ++++++++++++++++++++++++-----------
 1 file changed, 35 insertions(+), 15 deletions(-)

--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -7313,14 +7313,14 @@ static int intel_gen2_queue_flip(struct
 
        ret = intel_pin_and_fence_fb_obj(dev, obj, LP_RING(dev_priv));
        if (ret)
-               goto out;
+               goto err;
 
        /* Offset into the new buffer for cases of shared fbs between CRTCs */
        offset = crtc->y * fb->pitches[0] + crtc->x * fb->bits_per_pixel/8;
 
        ret = BEGIN_LP_RING(6);
        if (ret)
-               goto out;
+               goto err_unpin;
 
        /* Can't queue multiple flips, so wait for the previous
         * one to finish before executing the next.
@@ -7337,7 +7337,11 @@ static int intel_gen2_queue_flip(struct
        OUT_RING(obj->gtt_offset + offset);
        OUT_RING(0); /* aux display base address, unused */
        ADVANCE_LP_RING();
-out:
+       return 0;
+
+err_unpin:
+       intel_unpin_fb_obj(obj);
+err:
        return ret;
 }
 
@@ -7354,14 +7358,14 @@ static int intel_gen3_queue_flip(struct
 
        ret = intel_pin_and_fence_fb_obj(dev, obj, LP_RING(dev_priv));
        if (ret)
-               goto out;
+               goto err;
 
        /* Offset into the new buffer for cases of shared fbs between CRTCs */
        offset = crtc->y * fb->pitches[0] + crtc->x * fb->bits_per_pixel/8;
 
        ret = BEGIN_LP_RING(6);
        if (ret)
-               goto out;
+               goto err_unpin;
 
        if (intel_crtc->plane)
                flip_mask = MI_WAIT_FOR_PLANE_B_FLIP;
@@ -7376,7 +7380,11 @@ static int intel_gen3_queue_flip(struct
        OUT_RING(MI_NOOP);
 
        ADVANCE_LP_RING();
-out:
+       return 0;
+
+err_unpin:
+       intel_unpin_fb_obj(obj);
+err:
        return ret;
 }
 
@@ -7392,11 +7400,11 @@ static int intel_gen4_queue_flip(struct
 
        ret = intel_pin_and_fence_fb_obj(dev, obj, LP_RING(dev_priv));
        if (ret)
-               goto out;
+               goto err;
 
        ret = BEGIN_LP_RING(4);
        if (ret)
-               goto out;
+               goto err_unpin;
 
        /* i965+ uses the linear or tiled offsets from the
         * Display Registers (which do not change across a page-flip)
@@ -7415,7 +7423,11 @@ static int intel_gen4_queue_flip(struct
        pipesrc = I915_READ(PIPESRC(intel_crtc->pipe)) & 0x0fff0fff;
        OUT_RING(pf | pipesrc);
        ADVANCE_LP_RING();
-out:
+       return 0;
+
+err_unpin:
+       intel_unpin_fb_obj(obj);
+err:
        return ret;
 }
 
@@ -7431,11 +7443,11 @@ static int intel_gen6_queue_flip(struct
 
        ret = intel_pin_and_fence_fb_obj(dev, obj, LP_RING(dev_priv));
        if (ret)
-               goto out;
+               goto err;
 
        ret = BEGIN_LP_RING(4);
        if (ret)
-               goto out;
+               goto err_unpin;
 
        OUT_RING(MI_DISPLAY_FLIP |
                 MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
@@ -7452,7 +7464,11 @@ static int intel_gen6_queue_flip(struct
        pipesrc = I915_READ(PIPESRC(intel_crtc->pipe)) & 0x0fff0fff;
        OUT_RING(pf | pipesrc);
        ADVANCE_LP_RING();
-out:
+       return 0;
+
+err_unpin:
+       intel_unpin_fb_obj(obj);
+err:
        return ret;
 }
 
@@ -7474,18 +7490,22 @@ static int intel_gen7_queue_flip(struct
 
        ret = intel_pin_and_fence_fb_obj(dev, obj, ring);
        if (ret)
-               goto out;
+               goto err;
 
        ret = intel_ring_begin(ring, 4);
        if (ret)
-               goto out;
+               goto err_unpin;
 
        intel_ring_emit(ring, MI_DISPLAY_FLIP_I915 | (intel_crtc->plane << 19));
        intel_ring_emit(ring, (fb->pitches[0] | obj->tiling_mode));
        intel_ring_emit(ring, (obj->gtt_offset));
        intel_ring_emit(ring, (MI_NOOP));
        intel_ring_advance(ring);
-out:
+       return 0;
+
+err_unpin:
+       intel_unpin_fb_obj(obj);
+err:
        return ret;
 }
 


Patches currently in stable-queue which might be from [email protected] 
are

queue-3.4/0011-drm-i915-add-some-barriers-when-changing-DIPs.patch
queue-3.4/0008-drm-i915-Wait-for-all-pending-operations-to-the-fb-b.patch
queue-3.4/0016-drm-i915-Reduce-a-pin-leak-BUG-into-a-WARN.patch
queue-3.4/0018-drm-i915-Fix-GT_MODE-default-value.patch
queue-3.4/0003-drm-i915-fix-up-ivb-plane-3-pageflips.patch
queue-3.4/0002-drm-i915-Unpin-the-flip-target-if-we-fail-to-queue-t.patch
queue-3.4/0017-drm-i915-prevent-possible-pin-leak-on-error-path.patch
queue-3.4/0009-drm-i915-don-t-pwrite-tiled-objects-through-the-gtt.patch
queue-3.4/0012-drm-i915-SDVO-hotplug-have-different-interrupt-statu.patch
queue-3.4/0020-drm-i915-Flush-the-pending-flips-on-the-CRTC-before-.patch
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