This is a note to let you know that I've just added the patch titled
can: c_can: Set reserved bit in IFx_MASK2 to 1 on write
to the 3.7-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
can-c_can-set-reserved-bit-in-ifx_mask2-to-1-on-write.patch
and it can be found in the queue-3.7 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <[email protected]> know about it.
>From 2bd3bc4e8472424f1a6009825397639a8968920a Mon Sep 17 00:00:00 2001
From: Alexander Stein <[email protected]>
Date: Thu, 13 Dec 2012 10:06:10 +0100
Subject: can: c_can: Set reserved bit in IFx_MASK2 to 1 on write
From: Alexander Stein <[email protected]>
commit 2bd3bc4e8472424f1a6009825397639a8968920a upstream.
According to C_CAN documentation, the reserved bit in IFx_MASK2 register is
fixed 1.
Signed-off-by: Alexander Stein <[email protected]>
Signed-off-by: Marc Kleine-Budde <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>
---
drivers/net/can/c_can/c_can.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
--- a/drivers/net/can/c_can/c_can.c
+++ b/drivers/net/can/c_can/c_can.c
@@ -482,8 +482,12 @@ static void c_can_setup_receive_object(s
priv->write_reg(priv, C_CAN_IFACE(MASK1_REG, iface),
IFX_WRITE_LOW_16BIT(mask));
+
+ /* According to C_CAN documentation, the reserved bit
+ * in IFx_MASK2 register is fixed 1
+ */
priv->write_reg(priv, C_CAN_IFACE(MASK2_REG, iface),
- IFX_WRITE_HIGH_16BIT(mask));
+ IFX_WRITE_HIGH_16BIT(mask) | BIT(13));
priv->write_reg(priv, C_CAN_IFACE(ARB1_REG, iface),
IFX_WRITE_LOW_16BIT(id));
Patches currently in stable-queue which might be from
[email protected] are
queue-3.7/can-c_can-set-reserved-bit-in-ifx_mask2-to-1-on-write.patch
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