This is a note to let you know that I've just added the patch titled
ASoC: sglt5000: Fix SGTL5000_PLL_FRAC_DIV_MASK
to the 3.0-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
asoc-sglt5000-fix-sgtl5000_pll_frac_div_mask.patch
and it can be found in the queue-3.0 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <[email protected]> know about it.
>From 5c78dfe87ea04b501ee000a7f03b9432ac9d008c Mon Sep 17 00:00:00 2001
From: Fabio Estevam <[email protected]>
Date: Thu, 4 Jul 2013 20:01:03 -0300
Subject: ASoC: sglt5000: Fix SGTL5000_PLL_FRAC_DIV_MASK
From: Fabio Estevam <[email protected]>
commit 5c78dfe87ea04b501ee000a7f03b9432ac9d008c upstream.
SGTL5000_PLL_FRAC_DIV_MASK is used to mask bits 0-10 (11 bits in total) of
register CHIP_PLL_CTRL, so fix the mask to accomodate all this bit range.
Reported-by: Oskar Schirmer <[email protected]>
Signed-off-by: Fabio Estevam <[email protected]>
Signed-off-by: Mark Brown <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>
---
sound/soc/codecs/sgtl5000.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/sound/soc/codecs/sgtl5000.h
+++ b/sound/soc/codecs/sgtl5000.h
@@ -347,7 +347,7 @@
#define SGTL5000_PLL_INT_DIV_MASK 0xf800
#define SGTL5000_PLL_INT_DIV_SHIFT 11
#define SGTL5000_PLL_INT_DIV_WIDTH 5
-#define SGTL5000_PLL_FRAC_DIV_MASK 0x0700
+#define SGTL5000_PLL_FRAC_DIV_MASK 0x07ff
#define SGTL5000_PLL_FRAC_DIV_SHIFT 0
#define SGTL5000_PLL_FRAC_DIV_WIDTH 11
Patches currently in stable-queue which might be from
[email protected] are
queue-3.0/asoc-sglt5000-fix-sgtl5000_pll_frac_div_mask.patch
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