Hi Brian, ----- Mail original ----- > De: "Brian Norris" <[email protected]> > À: "Marek Vasut" <[email protected]> > Cc: [email protected], [email protected], "Vivien Didelot" > <[email protected]> > Envoyé: Dimanche 11 Août 2013 22:44:31 > Objet: Re: [PATCH] mtd: m25p80: Micron SPI uses Macronix-style 4-byte > addressing > > On Fri, Aug 9, 2013 at 11:46 AM, Marek Vasut <[email protected]> wrote: > > Dear Brian Norris, > > > >> For SPI NOR flash that are larger than 128Mbit (16MiB), we need 4 > >> bytes > >> of address space to reach the entire flash; however, the original > >> SPI > >> flash protocol used only 3 bytes for the address. So far, the > >> practice > >> for handling this has been either to use new command opcodes that > >> are > >> defined to use 4 bytes for their address, or to use special > >> mode-switching command to configure all > >> traditionally-3-byte-address > >> commands to take 4 bytes instead. > > [snip long description of a mess] > > > The situation with the 4b addressing is a horrible mess :( > > Agreed. It took me a while to figure out that this was the root of my > problems last week. > > > Acked-by: Marek Vasut <[email protected]> > > Thanks. > > Brian >
I'm just adding [email protected] in the loop. Thanks, Vivien. -- To unsubscribe from this list: send the line "unsubscribe stable" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
