This is a note to let you know that I've just added the patch titled
ARM: mvebu: re-enable PCIe on Armada 370 DB
to the 3.10-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
arm-mvebu-re-enable-pcie-on-armada-370-db.patch
and it can be found in the queue-3.10 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <[email protected]> know about it.
>From 96039f735e290281d0c8a08fc467de2cd610543d Mon Sep 17 00:00:00 2001
From: Thomas Petazzoni <[email protected]>
Date: Mon, 25 Nov 2013 17:26:47 +0100
Subject: ARM: mvebu: re-enable PCIe on Armada 370 DB
From: Thomas Petazzoni <[email protected]>
commit 96039f735e290281d0c8a08fc467de2cd610543d upstream.
Commit 14fd8ed0a7fd19913 ("ARM: mvebu: Relocate Armada 370/XP PCIe
device tree nodes") relocated the PCIe controller DT nodes one level
up in the Device Tree, to reflect a more correct representation of the
hardware introduced by the mvebu-mbus Device Tree binding.
However, while most of the boards were properly adjusted accordingly,
the Armada 370 DB board was left unchanged, and therefore, PCIe is
seen as not enabled on this board. This patch fixes that by moving the
PCIe controller node one level-up in armada-370-db.dts.
Signed-off-by: Thomas Petazzoni <[email protected]>
Fixes: 14fd8ed0a7fd19913 "ARM: mvebu: Relocate Armada 370/XP PCIe device tree
nodes"
Signed-off-by: Jason Cooper <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>
---
arch/arm/boot/dts/armada-370-db.dts | 28 ++++++++++++++--------------
1 file changed, 14 insertions(+), 14 deletions(-)
--- a/arch/arm/boot/dts/armada-370-db.dts
+++ b/arch/arm/boot/dts/armada-370-db.dts
@@ -95,22 +95,22 @@
spi-max-frequency = <50000000>;
};
};
+ };
- pcie-controller {
+ pcie-controller {
+ status = "okay";
+ /*
+ * The two PCIe units are accessible through
+ * both standard PCIe slots and mini-PCIe
+ * slots on the board.
+ */
+ pcie@1,0 {
+ /* Port 0, Lane 0 */
+ status = "okay";
+ };
+ pcie@2,0 {
+ /* Port 1, Lane 0 */
status = "okay";
- /*
- * The two PCIe units are accessible through
- * both standard PCIe slots and mini-PCIe
- * slots on the board.
- */
- pcie@1,0 {
- /* Port 0, Lane 0 */
- status = "okay";
- };
- pcie@2,0 {
- /* Port 1, Lane 0 */
- status = "okay";
- };
};
};
};
Patches currently in stable-queue which might be from
[email protected] are
queue-3.10/arm-mvebu-re-enable-pcie-on-armada-370-db.patch
queue-3.10/arm-mvebu-use-the-virtual-cpu-registers-to-access-coherency-registers.patch
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