From: Takashi Iwai <[email protected]>
Subject: drm/cirrus: correct register values for 16bpp

When the mode is set with 16bpp on QEMU, the output gets totally broken. 
The culprit is the bogus register values set for 16bpp, which was likely
copied from from a wrong place.

Addresses https://bugzilla.novell.com/show_bug.cgi?id=799216

Signed-off-by: Takashi Iwai <[email protected]>
Signed-off-by: Jiri Slaby <[email protected]>
Cc: David Airlie <[email protected]>
Cc: <[email protected]>
Signed-off-by: Andrew Morton <[email protected]>
---

 drivers/gpu/drm/cirrus/cirrus_mode.c |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff -puN 
drivers/gpu/drm/cirrus/cirrus_mode.c~drm-cirrus-correct-register-values-for-16bpp
 drivers/gpu/drm/cirrus/cirrus_mode.c
--- 
a/drivers/gpu/drm/cirrus/cirrus_mode.c~drm-cirrus-correct-register-values-for-16bpp
+++ a/drivers/gpu/drm/cirrus/cirrus_mode.c
@@ -273,8 +273,8 @@ static int cirrus_crtc_mode_set(struct d
                sr07 |= 0x11;
                break;
        case 16:
-               sr07 |= 0xc1;
-               hdr = 0xc0;
+               sr07 |= 0x17;
+               hdr = 0xc1;
                break;
        case 24:
                sr07 |= 0x15;
_
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