The patch below does not apply to the 3.14-stable tree.
If someone wants it applied there, or to any other stable or longterm
tree, then please email the backport, including the original git commit
id to <[email protected]>.

thanks,

greg k-h

------------------ original commit in Linus's tree ------------------

>From 5d708680eac2a8e2a0981007278a759df738d15b Mon Sep 17 00:00:00 2001
From: Damien Lespiau <[email protected]>
Date: Wed, 26 Mar 2014 18:41:51 +0000
Subject: [PATCH] drm/i915/bdw: Implement Wa4x4STCOptimizationDisable:bdw
MIME-Version: 1.0
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Not implementing this W/A can lead to hangs.

Cc: Ben Widawsky <[email protected]>
Cc: Rafael Barbalho <[email protected]>
Cc: Ville Syrjälä <[email protected]>
Signed-off-by: Damien Lespiau <[email protected]>
Reviewed-by: Ben Widawsky <[email protected]>
Cc: [email protected]
Signed-off-by: Daniel Vetter <[email protected]>

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 74f7d853eb58..d90dc20077e3 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -973,7 +973,8 @@ enum punit_power_well {
 #define CACHE_MODE_0_GEN7      0x7000 /* IVB+ */
 #define   HIZ_RAW_STALL_OPT_DISABLE (1<<2)
 #define CACHE_MODE_1           0x7004 /* IVB+ */
-#define   PIXEL_SUBSPAN_COLLECT_OPT_DISABLE (1<<6)
+#define   PIXEL_SUBSPAN_COLLECT_OPT_DISABLE    (1<<6)
+#define   GEN8_4x4_STC_OPTIMIZATION_DISABLE    (1<<6)
 
 #define GEN6_BLITTER_ECOSKPD   0x221d0
 #define   GEN6_BLITTER_LOCK_SHIFT                      16
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index c1e2d75f4c40..b66a43b90d1b 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4882,6 +4882,10 @@ static void gen8_init_clock_gating(struct drm_device 
*dev)
        /* WaDisableSDEUnitClockGating:bdw */
        I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) |
                   GEN8_SDEUNIT_CLOCK_GATE_DISABLE);
+
+       /* Wa4x4STCOptimizationDisable:bdw */
+       I915_WRITE(CACHE_MODE_1,
+                  _MASKED_BIT_ENABLE(GEN8_4x4_STC_OPTIMIZATION_DISABLE));
 }
 
 static void haswell_init_clock_gating(struct drm_device *dev)

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