Hi Gabor, > On some AR934x based systems, where the frequency of > the AHB bus is relatively high, the built-in watchdog > causes a spurious restart when it gets enabled. > > The possible cause of these restarts is that the timeout > value written into the TIMER register does not reaches > the hardware in time. > > Add an explicit delay into the ath79_wdt_enable function > to avoid the spurious restarts. > > Signed-off-by: Gabor Juhos <[email protected]> > Cc: <[email protected]> > --- > drivers/watchdog/ath79_wdt.c | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/drivers/watchdog/ath79_wdt.c b/drivers/watchdog/ath79_wdt.c > index 399c3fd..0e67d96 100644 > --- a/drivers/watchdog/ath79_wdt.c > +++ b/drivers/watchdog/ath79_wdt.c > @@ -20,6 +20,7 @@ > #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt > > #include <linux/bitops.h> > +#include <linux/delay.h> > #include <linux/errno.h> > #include <linux/fs.h> > #include <linux/io.h> > @@ -90,6 +91,15 @@ static inline void ath79_wdt_keepalive(void) > static inline void ath79_wdt_enable(void) > { > ath79_wdt_keepalive(); > + > + /* > + * Updating the TIMER register requires a few microseconds > + * on the AR934x SoCs at least. Use a small delay to ensure > + * that the TIMER register is updated within the hardware > + * before enabling the watchdog. > + */ > + udelay(2); > + > ath79_wdt_wr(WDOG_REG_CTRL, WDOG_CTRL_ACTION_FCR); > /* flush write */ > ath79_wdt_rr(WDOG_REG_CTRL);
This patch has been added to linux-watchdog-next. Kind regards, Wim. -- To unsubscribe from this list: send the line "unsubscribe stable" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
