This is a note to let you know that I've just added the patch titled
drm/radeon/dp: fix lane/clock setup for dp 1.2 capable devices
to the 3.14-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
drm-radeon-dp-fix-lane-clock-setup-for-dp-1.2-capable-devices.patch
and it can be found in the queue-3.14 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <[email protected]> know about it.
>From 3b6d9fd23e015b5397c438fd3cd74147d2c805b6 Mon Sep 17 00:00:00 2001
From: Alex Deucher <[email protected]>
Date: Tue, 27 May 2014 13:48:05 -0400
Subject: drm/radeon/dp: fix lane/clock setup for dp 1.2 capable devices
From: Alex Deucher <[email protected]>
commit 3b6d9fd23e015b5397c438fd3cd74147d2c805b6 upstream.
Only DCE5+ asics support DP 1.2.
Noticed by ArtForz on IRC.
Signed-off-by: Alex Deucher <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>
---
drivers/gpu/drm/radeon/atombios_dp.c | 17 +++++++++++++++--
1 file changed, 15 insertions(+), 2 deletions(-)
--- a/drivers/gpu/drm/radeon/atombios_dp.c
+++ b/drivers/gpu/drm/radeon/atombios_dp.c
@@ -386,6 +386,19 @@ static int dp_get_max_dp_pix_clock(int l
/***** radeon specific DP functions *****/
+static int radeon_dp_get_max_link_rate(struct drm_connector *connector,
+ u8 dpcd[DP_DPCD_SIZE])
+{
+ int max_link_rate;
+
+ if (radeon_connector_is_dp12_capable(connector))
+ max_link_rate = min(drm_dp_max_link_rate(dpcd), 540000);
+ else
+ max_link_rate = min(drm_dp_max_link_rate(dpcd), 270000);
+
+ return max_link_rate;
+}
+
/* First get the min lane# when low rate is used according to pixel clock
* (prefer low rate), second check max lane# supported by DP panel,
* if the max lane# < low rate lane# then use max lane# instead.
@@ -395,7 +408,7 @@ static int radeon_dp_get_dp_lane_number(
int pix_clock)
{
int bpp = convert_bpc_to_bpp(radeon_get_monitor_bpc(connector));
- int max_link_rate = drm_dp_max_link_rate(dpcd);
+ int max_link_rate = radeon_dp_get_max_link_rate(connector, dpcd);
int max_lane_num = drm_dp_max_lane_count(dpcd);
int lane_num;
int max_dp_pix_clock;
@@ -433,7 +446,7 @@ static int radeon_dp_get_dp_link_clock(s
return 540000;
}
- return drm_dp_max_link_rate(dpcd);
+ return radeon_dp_get_max_link_rate(connector, dpcd);
}
static u8 radeon_dp_encoder_service(struct radeon_device *rdev,
Patches currently in stable-queue which might be from [email protected]
are
queue-3.14/drm-radeon-only-apply-hdmi-bpc-pll-flags-when-encoder-mode-is-hdmi.patch
queue-3.14/drm-radeon-dpm-fix-typo-in-vddci-setup-for-eg-btc.patch
queue-3.14/drm-radeon-dpm-fix-vddci-setup-typo-on-cayman.patch
queue-3.14/drm-radeon-dp-fix-lane-clock-setup-for-dp-1.2-capable-devices.patch
queue-3.14/drm-radeon-fix-typo-in-radeon_connector_is_dp12_capable.patch
queue-3.14/drm-radeon-cik-fix-typo-in-eop-packet.patch
queue-3.14/drm-radeon-atom-fix-dithering-on-certain-panels.patch
queue-3.14/vgaswitcheroo-switch-the-mux-to-the-igp-on-power-down-when.patch
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