This is a note to let you know that I've just added the patch titled
ARM: imx: fix TLB missing of IOMUXC base address during suspend
to the 3.16-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
arm-imx-fix-tlb-missing-of-iomuxc-base-address-during-suspend.patch
and it can be found in the queue-3.16 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <[email protected]> know about it.
>From 59d05b518321618177b898a6801503e31b15b25b Mon Sep 17 00:00:00 2001
From: Shawn Guo <[email protected]>
Date: Sat, 26 Jul 2014 10:33:03 +0800
Subject: ARM: imx: fix TLB missing of IOMUXC base address during suspend
From: Shawn Guo <[email protected]>
commit 59d05b518321618177b898a6801503e31b15b25b upstream.
After the suspend routine running in OCRAM puts DDR into self-refresh,
it will access IOMUXC block to float DDR IO for power saving. A TLB
missing of IOMUXC base address may happen in this case, and triggers an
access to DDR, and thus hangs the system.
The failure is discovered by running suspend/resume on a Cubox-i board.
Though the issue is not Cubox-i specific, it can be hit the on the board
quite easily with the 3.15 or 3.16 kernel.
Fix the issue with a dummy access to IOMUXC block at the beginning of
suspend routine, so that the address translation can be filled into TLB
before DDR is put into self-refresh.
Signed-off-by: Shawn Guo <[email protected]>
Acked-by: Anson Huang <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>
---
arch/arm/mach-imx/suspend-imx6.S | 2 ++
1 file changed, 2 insertions(+)
--- a/arch/arm/mach-imx/suspend-imx6.S
+++ b/arch/arm/mach-imx/suspend-imx6.S
@@ -172,6 +172,8 @@ ENTRY(imx6_suspend)
ldr r6, [r11, #0x0]
ldr r11, [r0, #PM_INFO_MX6Q_GPC_V_OFFSET]
ldr r6, [r11, #0x0]
+ ldr r11, [r0, #PM_INFO_MX6Q_IOMUXC_V_OFFSET]
+ ldr r6, [r11, #0x0]
/* use r11 to store the IO address */
ldr r11, [r0, #PM_INFO_MX6Q_SRC_V_OFFSET]
Patches currently in stable-queue which might be from [email protected]
are
queue-3.16/arm-dts-vf610-twr-fix-pinctrl_esdhc1-pin-definitions.patch
queue-3.16/arm-dts-i.mx53-fix-apparent-bug-in-vpu-clks.patch
queue-3.16/arm-imx-fix-tlb-missing-of-iomuxc-base-address-during-suspend.patch
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