Author: sebor
Date: Thu Aug 4 18:24:22 2005
New Revision: 230382
URL: http://svn.apache.org/viewcvs?rev=230382&view=rev
Log:
2005-08-04 Nicole Willson <[EMAIL PROTECTED]>
Martin Sebor <[EMAIL PROTECTED]>
STDCXX-11:
* include/rw/_mutex.h (__rw_atomic_preincrement,
__rw_atomic_predecrement, __rw_atomic_exhange): Added
long long overloads for 32-bit IA64.
* src/atomic.s: Conditionally #included atomic-ia64-32.s.
* src/atomic-ia64-32.s: New. Same as atomic-ia64.s except
for 32-bit mode.
Added:
incubator/stdcxx/trunk/src/atomic-ia64-32.s
Modified:
incubator/stdcxx/trunk/include/rw/_mutex.h
incubator/stdcxx/trunk/src/atomic.s
Modified: incubator/stdcxx/trunk/include/rw/_mutex.h
URL:
http://svn.apache.org/viewcvs/incubator/stdcxx/trunk/include/rw/_mutex.h?rev=230382&r1=230381&r2=230382&view=diff
==============================================================================
--- incubator/stdcxx/trunk/include/rw/_mutex.h (original)
+++ incubator/stdcxx/trunk/include/rw/_mutex.h Thu Aug 4 18:24:22 2005
@@ -5,7 +5,7 @@
* This is an internal header file used to implement the C++ Standard
* Library. It should never be #included directly by a program.
*
- * $Id: //stdlib/dev/include/rw/_mutex.h#63 $
+ * $Id$
*
***************************************************************************
*
@@ -1942,6 +1942,72 @@
}
# endif // _RWSTD_LONG_SIZE == _RWSTD_INT_SIZE
+
+# ifdef _RWSTD_LONG_LONG
+# if _RWSTD_LLONG_SIZE != _RWSTD_LONG_SIZE
+
+inline _RWSTD_LONG_LONG
+__rw_atomic_preincrement (_RWSTD_LONG_LONG &__x, bool)
+{
+ _RWSTD_COMPILE_ASSERT (8 == sizeof (_RWSTD_LONG_LONG));
+
+ return __rw_atomic_add64 (_RWSTD_REINTERPRET_CAST (_RWSTD_INT64_T*, &__x),
+ +1);
+}
+
+
+inline unsigned _RWSTD_LONG_LONG
+__rw_atomic_preincrement (unsigned _RWSTD_LONG_LONG &__x, bool)
+{
+ _RWSTD_COMPILE_ASSERT (8 == sizeof (unsigned _RWSTD_LONG_LONG));
+
+ return __rw_atomic_add64 (_RWSTD_REINTERPRET_CAST (_RWSTD_INT64_T*, &__x),
+ +1);
+}
+
+
+inline _RWSTD_LONG_LONG
+__rw_atomic_predecrement (_RWSTD_LONG_LONG &__x, bool)
+{
+ _RWSTD_COMPILE_ASSERT (8 == sizeof (_RWSTD_LONG_LONG));
+
+ return __rw_atomic_add64 (_RWSTD_REINTERPRET_CAST (_RWSTD_INT64_T*, &__x),
+ -1);
+}
+
+
+inline unsigned _RWSTD_LONG_LONG
+__rw_atomic_predecrement (unsigned _RWSTD_LONG_LONG &__x, bool)
+{
+ _RWSTD_COMPILE_ASSERT (8 == sizeof (unsigned _RWSTD_LONG_LONG));
+
+ return __rw_atomic_add64 (_RWSTD_REINTERPRET_CAST (_RWSTD_INT64_T*, &__x),
+ -1);
+}
+
+
+inline _RWSTD_LONG_LONG
+__rw_atomic_exchange (_RWSTD_LONG_LONG &__x, _RWSTD_LONG_LONG __y, bool)
+{
+ _RWSTD_COMPILE_ASSERT (8 == sizeof (_RWSTD_LONG_LONG));
+
+ return __rw_atomic_xchg64 (_RWSTD_REINTERPRET_CAST (_RWSTD_INT64_T*, &__x),
+ _RWSTD_STATIC_CAST (_RWSTD_INT64_T, __y));
+}
+
+
+inline unsigned _RWSTD_LONG_LONG
+__rw_atomic_exchange (unsigned _RWSTD_LONG_LONG &__x,
+ unsigned _RWSTD_LONG_LONG __y, bool)
+{
+ _RWSTD_COMPILE_ASSERT (8 == sizeof (unsigned _RWSTD_LONG_LONG));
+
+ return __rw_atomic_xchg64 (_RWSTD_REINTERPRET_CAST (_RWSTD_INT64_T*, &__x),
+ _RWSTD_STATIC_CAST (_RWSTD_INT64_T, __y));
+}
+
+# endif // _RWSTD_LLONG_SIZE != _RWSTD_LONG_SIZE
+# endif // _RWSTD_LONG_LONG
#endif // IA64
Added: incubator/stdcxx/trunk/src/atomic-ia64-32.s
URL:
http://svn.apache.org/viewcvs/incubator/stdcxx/trunk/src/atomic-ia64-32.s?rev=230382&view=auto
==============================================================================
--- incubator/stdcxx/trunk/src/atomic-ia64-32.s (added)
+++ incubator/stdcxx/trunk/src/atomic-ia64-32.s Thu Aug 4 18:24:22 2005
@@ -0,0 +1,275 @@
+////////////////////////////////////////////////////////////////////////////
+//
+// atomic-ia64-32.s
+//
+// $Id: atomic-ia64.s 225375 2005-07-26 19:04:10Z sebor $
+//
+////////////////////////////////////////////////////////////////////////////
+//
+// Copyright (c) 1994-2005 Quovadx, Inc., acting through its Rogue Wave
+// Software division. Licensed under the Apache License, Version 2.0 (the
+// "License"); you may not use this file except in compliance with the
+// License. You may obtain a copy of the License at
+// http://www.apache.org/licenses/LICENSE-2.0. Unless required by
+// applicable law or agreed to in writing, software distributed under
+// the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
+// CONDITIONS OF ANY KIND, either express or implied. See the License
+// for the specific language governing permissions and limitations under
+// the License.
+//
+////////////////////////////////////////////////////////////////////////////
+
+ .text
+ //.pred.safe_across_calls p1-p5,p16-p63
+ .psr abi32
+ .psr msb
+
+////////////////////////////////////////////////////////////////////////////
+// extern "C" char __rw_atomic_xchg8 (char *x, char y);
+//
+// Atomically assigns the 8-bit value y to *x and returns
+// the original (before assignment) 8-bit value of *x.
+////////////////////////////////////////////////////////////////////////////
+
+ .global __rw_atomic_xchg8#
+ .proc __rw_atomic_xchg8#
+
+__rw_atomic_xchg8:
+
+ .prologue
+ .body
+ // .mfb
+ addp4 r9 = 0, r32 // Needed to be able to dereference a 32 bit pointer
+ ;;
+ xchg1 r8 = [r9], r33
+ nop 0
+ br.ret.sptk.many b0
+
+ .endp __rw_atomic_xchg8#
+
+////////////////////////////////////////////////////////////////////////////
+// extern "C" char __rw_atomic_add8 (char *x, int y);
+//
+// Atomically increments the 8-bit value *x by y and returns
+// the new (after increment) 8-bit value of *x.
+////////////////////////////////////////////////////////////////////////////
+
+ .global __rw_atomic_add8#
+ .proc __rw_atomic_add8#
+
+__rw_atomic_add8:
+
+ .prologue
+ .body
+ // .mmb
+ mf
+ addp4 r9 = 0, r32 // Needed to be able to dereference a 32 bit pointer
+ ;;
+ ld1.acq r15 = [r9]
+ nop 0
+ ;;
+.add8_busywait:
+ // .mmi
+ mov ar.ccv = r15
+ add r8 = r15, r33
+ mov r2 = r15
+ ;;
+ // .mmb
+ nop 0
+ cmpxchg1.acq r15 = [r9], r8, ar.ccv
+ nop 0
+ ;;
+ // .mbb
+ cmp.ne p8, p9 = r2, r15
+ (p9) br.ret.dpnt.many rp
+ br .add8_busywait
+
+ .endp __rw_atomic_add8#
+
+////////////////////////////////////////////////////////////////////////////
+// extern "C" short __rw_atomic_xchg16 (short *x, short y);
+//
+// Atomically assigns the 16-bit value y to *x and returns
+// the original (before assignment) 16-bit value of *x.
+////////////////////////////////////////////////////////////////////////////
+
+ .global __rw_atomic_xchg16#
+ .proc __rw_atomic_xchg16#
+
+__rw_atomic_xchg16:
+
+ .prologue
+ .body
+ // .mfb
+ addp4 r9 = 0, r32 // Needed to be able to dereference a 32 bit pointer
+ ;;
+ xchg2 r8 = [r9], r33
+ nop 0
+ br.ret.sptk.many b0
+
+ .endp __rw_atomic_xchg16#
+
+////////////////////////////////////////////////////////////////////////////
+// extern "C" short __rw_atomic_add16 (short *x, short y);
+//
+// Atomically increments the 16-bit value *x by y and returns
+// the new (after increment) 16-bit value of *x.
+////////////////////////////////////////////////////////////////////////////
+
+ .global __rw_atomic_add16#
+ .proc __rw_atomic_add16#
+
+__rw_atomic_add16:
+
+ .prologue
+ .body
+ // .mmb
+ mf
+ addp4 r9 = 0, r32 // Needed to be able to dereference a 32 bit pointer
+ ;;
+ ld2.acq r15 = [r9]
+ nop 0
+ ;;
+.add16_busywait:
+ // .mmi
+ mov ar.ccv = r15
+ add r8 = r15, r33
+ mov r2 = r15
+ ;;
+ // .mmb
+ nop 0
+ cmpxchg2.acq r15 = [r9], r8, ar.ccv
+ nop 0
+ ;;
+ // .mbb
+ cmp.ne p8, p9 = r2, r15
+ (p9) br.ret.dpnt.many rp
+ br .add16_busywait
+
+ .endp __rw_atomic_add16#
+
+////////////////////////////////////////////////////////////////////////////
+// extern "C" int __rw_atomic_xchg32 (int *x, int y);
+//
+// Atomically assigns the 32-bit value y to *x and returns
+// the original (before assignment) 32-bit value of *x.
+////////////////////////////////////////////////////////////////////////////
+
+ .global __rw_atomic_xchg32#
+ .proc __rw_atomic_xchg32#
+
+__rw_atomic_xchg32:
+
+ .prologue
+ .body
+ // .mfb
+
+ addp4 r9 = 0, r32 // Needed to be able to dereference a 32 bit pointer
+ ;;
+ xchg4 r8 = [r9], r33
+ nop 0
+ br.ret.sptk.many b0
+
+ .endp __rw_atomic_xchg32#
+
+////////////////////////////////////////////////////////////////////////////
+// extern "C" int __rw_atomic_add32 (int *x, int y);
+//
+// Atomically increments the 32-bit value *x by y and returns
+// the new (after increment) 32-bit value of *x.
+////////////////////////////////////////////////////////////////////////////
+
+ .global __rw_atomic_add32#
+ .proc __rw_atomic_add32#
+
+__rw_atomic_add32:
+
+ .prologue
+ .body
+ // .mmb
+ mf
+ addp4 r9 = 0, r32 // Needed to be able to dereference a 32 bit pointer
+ ;;
+ ld4.acq r15 = [r9]
+ nop 0
+ ;;
+.add32_busywait:
+ // .mmi
+ mov ar.ccv = r15
+ add r8 = r15, r33
+ mov r2 = r15
+ ;;
+ // .mmb
+ nop 0
+ cmpxchg4.acq r15 = [r9], r8, ar.ccv
+ nop 0
+ ;;
+ // .mbb
+ cmp4.ne p8, p9 = r2, r15
+ (p9) br.ret.dpnt.many rp
+ br .add32_busywait
+
+ .endp __rw_atomic_add32#
+
+////////////////////////////////////////////////////////////////////////////
+// extern "C" int64_t __rw_atomic_xchg64 (int64_t *x, int64_t y);
+//
+// Atomically assigns the 64-bit value y to *x and returns
+// the original (before assignment) 64-bit value of *x.
+////////////////////////////////////////////////////////////////////////////
+
+ .global __rw_atomic_xchg64#
+ .proc __rw_atomic_xchg64#
+
+__rw_atomic_xchg64:
+
+ .prologue
+ .body
+ // .mfb
+
+ addp4 r9 = 0, r32 // Needed to be able to dereference a 32 bit pointer
+ ;;
+ xchg8 r8 = [r9], r33
+ nop 0
+ br.ret.sptk.many b0
+
+ .endp __rw_atomic_xchg64#
+
+////////////////////////////////////////////////////////////////////////////
+// extern "C" int64_t __rw_atomic_add64 (int64_t *x, int64_t y);
+//
+// Atomically increments the 16-bit value *x by y and returns
+// the new (after increment) 16-bit value of *x.
+////////////////////////////////////////////////////////////////////////////
+
+ .global __rw_atomic_add64#
+ .proc __rw_atomic_add64#
+
+__rw_atomic_add64:
+
+ .prologue
+ .body
+ // .mmb
+ mf
+ addp4 r9 = 0, r32 // Needed to be able to dereference a 32 bit pointer
+ ;;
+ ld8.acq r15 = [r9]
+ nop 0
+ ;;
+.add64_busywait:
+ // .mmi
+ mov ar.ccv = r15
+ add r8 = r15, r33
+ mov r2 = r15
+ ;;
+ // .mmb
+ nop 0
+ cmpxchg8.acq r15 = [r9], r8, ar.ccv
+ nop 0
+ ;;
+ // .mbb
+ cmp.ne p8, p9 = r2, r15
+ (p9) br.ret.dpnt.many rp
+ br .add64_busywait
+
+ .endp __rw_atomic_add64#
Modified: incubator/stdcxx/trunk/src/atomic.s
URL:
http://svn.apache.org/viewcvs/incubator/stdcxx/trunk/src/atomic.s?rev=230382&r1=230381&r2=230382&view=diff
==============================================================================
--- incubator/stdcxx/trunk/src/atomic.s (original)
+++ incubator/stdcxx/trunk/src/atomic.s Thu Aug 4 18:24:22 2005
@@ -2,7 +2,7 @@
*
* atomic.s
*
- * $Id: //stdlib/dev/source/stdlib/atomic.s#11 $
+ * $Id$
*
***************************************************************************
*
@@ -24,8 +24,12 @@
# include "atomic-i86.s"
#endif
-#if defined (__ia64)
-# include "atomic-ia64.s"
+#if defined (__ia64) || defined (__ia64__)
+# if defined (_LP64) || defined (__LP64__)
+# include "atomic-ia64.s"
+# else
+# include "atomic-ia64-32.s"
+# endif
#endif
#if defined (__parisc)
