> Hallo, Sebastian, Hi,
I'm also working on the project. You can see some information about our student project here: http://ls7-www.cs.tu-dortmund.de/projectgroups/Cool-IP.php The goal of the project is the following: the camera captures images of the "Flusszelle" with about the highest possible framerate and with about 1000x1000 pixel. The images are preprocessed (according to algorithms developed by another part of our group) and transferred to a PC for further processing, visualisation and so on. At the moment, we are not sure if we can do lossless image compression. As you can see on this picture: http://ls7-www.cs.tu-dortmund.de/projectgroups/Cool-IP/SensorFlow.png we have very much noise. So its very important that we get the most out of the data of the image sensor. We did looked through the Verilog code but aren't sure so far, what the bit-width of imagedata is, used in the FPGA-dataflow? 16 bit, 12 bit, 8 bit? Greetings, Jens _______________________________________________ Support-list mailing list [email protected] http://support.elphel.com/mailman/listinfo/support-list_support.elphel.com
