On Wednesday 22 October 2008 11:01 am, John Baldwin wrote: > On Tuesday 21 October 2008 08:01:53 pm Jung-uk Kim wrote: > > Author: jkim > > Date: Wed Oct 22 00:01:53 2008 > > New Revision: 184146 > > URL: http://svn.freebsd.org/changeset/base/184146 > > > > Log: > > Set kern.timecounter.invariant_tsc to 1 for AMD CPU family 10h > > and higher even if BIOS does not advertise it. > > > > Modified: > > head/sys/amd64/amd64/identcpu.c > > head/sys/amd64/include/specialreg.h > > head/sys/i386/i386/identcpu.c > > head/sys/i386/include/specialreg.h > > > > Modified: head/sys/amd64/amd64/identcpu.c > > =================================================================== >=========== > > > --- head/sys/amd64/amd64/identcpu.c Tue Oct 21 23:36:28 > > 2008 (r184145) +++ head/sys/amd64/amd64/identcpu.c Wed Oct 22 > > 00:01:53 2008 (r184146) @@ -348,7 +348,9 @@ printcpuinfo(void) > > cpu_feature &= ~CPUID_HTT; > > > > if (!tsc_is_invariant && > > - (amd_pminfo & AMDPM_TSC_INVARIANT)) { > > + (strcmp(cpu_vendor, "AuthenticAMD") == 0 && > > + ((amd_pminfo & AMDPM_TSC_INVARIANT) != 0 || > > + AMD64_CPU_FAMILY(cpu_id) >= 0x10))) { > > tsc_is_invariant = 1; > > printf("\n P-state invariant TSC"); > > } > > Perhaps a simpler approach might be to just set AMDPM_TSC_INVARIANT > for AMD64_CPU_FAMILY(cpu_id) >= 0x10?
It seems Athlon X2 (Family 0Fh, Model 6Bh, Stepping G2) that I bought also has invariant TSC although it is not advertised by CPUID. If BIOS manufacturer decide to set the bit later, it should be honored IMO. Jung-uk Kim _______________________________________________ [email protected] mailing list http://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "[EMAIL PROTECTED]"
