On Wednesday 22 October 2008 02:29 pm, Jung-uk Kim wrote:
> On Wednesday 22 October 2008 11:53 am, Attilio Rao wrote:
> > 2008/10/21, Jung-uk Kim <[EMAIL PROTECTED]>:
> > > On Tuesday 21 October 2008 06:07 am, Attilio Rao wrote:
> > > > Something we could do with this is adding a "quirk" table of
> > > > TSC arch dependant known to be working (based on cpu_model
> > > > and such) and use that table in order to replace tsc_smp.
> > >
> > > Please note the invariant_tsc and smp_tsc are different.  If we
> > > go with the route, we need two quirk tables. :-(
> >
> > It doesn't matter.
> > I think it is silly we have different quirks flag states for TSC.
> > We should just having a table assuming that the TSC is safe to
> > use in SMP environments and gets rid of any other flag (in this
> > case, for amd64 based machine, the logic could, for example,
> > check if the CPU is P state invariant and assume it is safe,
> > etc.)
>
> Yes, it does matter as TSC is not just for timecounter and it can
> be used independently.  For example, if a thread is bound to a CPU

and the CPU has P-state invariant TSC,

> it can provide the fastest AND safest timer.
> Besides, the whole point was not to modify TSC freq. if it is
> independent from CPU freq.
>
> Jung-uk Kim
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