Author: marius
Date: Fri Mar 27 21:21:35 2009
New Revision: 190479
URL: http://svn.freebsd.org/changeset/base/190479

Log:
  MFC: r190319
  
  - Ensure that INTx isn't disabled, as these chips apparently have a
    quirk requiring it to be enabled even when using MSI.
  - Remove a comment which no longer applies since r190336.

Modified:
  stable/6/sys/   (props changed)
  stable/6/sys/contrib/pf/   (props changed)
  stable/6/sys/dev/bge/if_bge.c
  stable/6/sys/dev/bge/if_bgereg.h
  stable/6/sys/dev/cxgb/   (props changed)

Modified: stable/6/sys/dev/bge/if_bge.c
==============================================================================
--- stable/6/sys/dev/bge/if_bge.c       Fri Mar 27 21:21:22 2009        
(r190478)
+++ stable/6/sys/dev/bge/if_bge.c       Fri Mar 27 21:21:35 2009        
(r190479)
@@ -1278,8 +1278,7 @@ bge_stop_fw(sc)
 }
 
 /*
- * Do endian, PCI and DMA initialization. Also check the on-board ROM
- * self-test results.
+ * Do endian, PCI and DMA initialization.
  */
 static int
 bge_chipinit(struct bge_softc *sc)
@@ -1387,9 +1386,11 @@ bge_chipinit(struct bge_softc *sc)
 
        /*
         * Disable memory write invalidate.  Apparently it is not supported
-        * properly by these devices.
+        * properly by these devices.  Also ensure that INTx isn't disabled,
+        * as these chips need it even when using MSI.
         */
-       PCI_CLRBIT(sc->bge_dev, BGE_PCI_CMD, PCIM_CMD_MWIEN, 4);
+       PCI_CLRBIT(sc->bge_dev, BGE_PCI_CMD,
+           PCIM_CMD_INTxDIS | PCIM_CMD_MWIEN, 4);
 
 #ifdef __brokenalpha__
        /*

Modified: stable/6/sys/dev/bge/if_bgereg.h
==============================================================================
--- stable/6/sys/dev/bge/if_bgereg.h    Fri Mar 27 21:21:22 2009        
(r190478)
+++ stable/6/sys/dev/bge/if_bgereg.h    Fri Mar 27 21:21:35 2009        
(r190479)
@@ -402,6 +402,9 @@
 #ifndef PCIM_CMD_MWIEN
 #define        PCIM_CMD_MWIEN                  0x0010
 #endif
+#ifndef PCIM_CMD_INTxDIS
+#define        PCIM_CMD_INTxDIS                0x0400
+#endif
 
 /*
  * High priority mailbox registers
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