Author: andrew Date: Mon May 18 11:04:07 2015 New Revision: 283057 URL: https://svnweb.freebsd.org/changeset/base/283057
Log: Clean up the Amlogic interrupt controller driver to handle the case where we have both the Amlogic pic and a GIC. This may be the case in some configurations. Differential Revision: https://reviews.freebsd.org/D2432 Submitted by: John Wehle <[email protected]> Modified: head/sys/arm/amlogic/aml8726/aml8726_machdep.c head/sys/arm/amlogic/aml8726/aml8726_pic.c head/sys/arm/amlogic/aml8726/files.aml8726 head/sys/arm/conf/AML8726 head/sys/arm/conf/ODROIDC1 head/sys/arm/conf/VSATV102 head/sys/conf/options.arm Modified: head/sys/arm/amlogic/aml8726/aml8726_machdep.c ============================================================================== --- head/sys/arm/amlogic/aml8726/aml8726_machdep.c Mon May 18 11:02:43 2015 (r283056) +++ head/sys/arm/amlogic/aml8726/aml8726_machdep.c Mon May 18 11:04:07 2015 (r283057) @@ -40,6 +40,7 @@ __FBSDID("$FreeBSD$"); #include <machine/bus.h> #include <machine/cpufunc.h> #include <machine/devmap.h> +#include <machine/intr.h> #include <machine/machdep.h> #include <machine/platform.h> @@ -181,43 +182,31 @@ struct fdt_fixup_entry fdt_fixup_table[] { NULL, NULL } }; +#ifndef DEV_GIC static int fdt_pic_decode_ic(phandle_t node, pcell_t *intr, int *interrupt, int *trig, int *pol) { /* - * The single core chips have just an Amlogic PIC. However the - * multi core chips also have a GIC. + * The single core chips have just an Amlogic PIC. */ -#ifdef SMP - if (!fdt_is_compatible_strict(node, "arm,cortex-a9-gic")) -#else if (!fdt_is_compatible_strict(node, "amlogic,aml8726-pic")) -#endif return (ENXIO); *interrupt = fdt32_to_cpu(intr[1]); *trig = INTR_TRIGGER_EDGE; *pol = INTR_POLARITY_HIGH; - switch (*interrupt) { - case 30: /* INT_USB_A */ - case 31: /* INT_USB_B */ - *trig = INTR_TRIGGER_LEVEL; - break; - default: - break; - } - -#ifdef SMP - *interrupt += 32; -#endif - return (0); } +#endif fdt_pic_decode_t fdt_pic_table[] = { +#ifdef DEV_GIC + &gic_decode_fdt, +#else &fdt_pic_decode_ic, +#endif NULL }; Modified: head/sys/arm/amlogic/aml8726/aml8726_pic.c ============================================================================== --- head/sys/arm/amlogic/aml8726/aml8726_pic.c Mon May 18 11:02:43 2015 (r283056) +++ head/sys/arm/amlogic/aml8726/aml8726_pic.c Mon May 18 11:04:07 2015 (r283057) @@ -169,7 +169,7 @@ aml8726_pic_attach(device_t dev) CSR_WRITE_4(sc, AML_PIC_0_FIRQ_SEL + i * 16, 0); } -#ifndef SMP +#ifndef DEV_GIC arm_post_filter = aml8726_pic_eoi; #else device_printf(dev, "disabled in favor of gic\n"); @@ -207,7 +207,7 @@ static devclass_t aml8726_pic_devclass; EARLY_DRIVER_MODULE(pic, simplebus, aml8726_pic_driver, aml8726_pic_devclass, 0, 0, BUS_PASS_INTERRUPT); -#ifndef SMP +#ifndef DEV_GIC int arm_get_next_irq(int last) { Modified: head/sys/arm/amlogic/aml8726/files.aml8726 ============================================================================== --- head/sys/arm/amlogic/aml8726/files.aml8726 Mon May 18 11:02:43 2015 (r283056) +++ head/sys/arm/amlogic/aml8726/files.aml8726 Mon May 18 11:04:07 2015 (r283057) @@ -13,7 +13,7 @@ arm/amlogic/aml8726/aml8726_mp.c option arm/amlogic/aml8726/aml8726_identsoc.c standard arm/amlogic/aml8726/aml8726_ccm.c standard arm/amlogic/aml8726/aml8726_clkmsr.c standard -arm/amlogic/aml8726/aml8726_pic.c standard +arm/amlogic/aml8726/aml8726_pic.c optional aml_pic arm/amlogic/aml8726/aml8726_rtc.c standard arm/amlogic/aml8726/aml8726_timer.c standard arm/amlogic/aml8726/aml8726_wdt.c standard Modified: head/sys/arm/conf/AML8726 ============================================================================== --- head/sys/arm/conf/AML8726 Mon May 18 11:02:43 2015 (r283056) +++ head/sys/arm/conf/AML8726 Mon May 18 11:04:07 2015 (r283057) @@ -27,7 +27,6 @@ options HZ=100 options SCHED_ULE # ULE scheduler options PRINTF_BUFR_SIZE=128 # Prevent printf output being interspersed. options LINUX_BOOT_ABI -options SMP # Enable multiple cores # Debugging makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols @@ -52,6 +51,9 @@ options WITNESS_SKIPSPIN # Don't run wi #options BOOTP_NFSV3 #options BOOTP_WIRED_TO=axe0 +# Interrupt controller +device aml_pic + # MMC/SD/SDIO Card slot support device mmc # mmc/sd bus device mmcsd # mmc/sd flash cards @@ -59,9 +61,6 @@ device mmcsd # mmc/sd flash cards # Boot device is 2nd slice on MMC/SD card options ROOTDEVNAME=\"ufs:mmcsd0s2\" -# Interrupt controller -device gic - # GPIO device gpio device gpioled Modified: head/sys/arm/conf/ODROIDC1 ============================================================================== --- head/sys/arm/conf/ODROIDC1 Mon May 18 11:02:43 2015 (r283056) +++ head/sys/arm/conf/ODROIDC1 Mon May 18 11:04:07 2015 (r283057) @@ -22,5 +22,8 @@ include "AML8726" ident ODROIDC1 +# Interrupt controller +device gic + options FDT_DTB_STATIC makeoptions FDT_DTS_FILE=odroidc1.dts Modified: head/sys/arm/conf/VSATV102 ============================================================================== --- head/sys/arm/conf/VSATV102 Mon May 18 11:02:43 2015 (r283056) +++ head/sys/arm/conf/VSATV102 Mon May 18 11:04:07 2015 (r283057) @@ -22,5 +22,8 @@ include "AML8726" ident VSATV102 +# Interrupt controller +device gic + options FDT_DTB_STATIC makeoptions FDT_DTS_FILE=vsatv102-m6.dts Modified: head/sys/conf/options.arm ============================================================================== --- head/sys/conf/options.arm Mon May 18 11:02:43 2015 (r283056) +++ head/sys/conf/options.arm Mon May 18 11:04:07 2015 (r283057) @@ -21,6 +21,7 @@ CPU_XSCALE_81342 opt_global.h CPU_XSCALE_IXP425 opt_global.h CPU_XSCALE_IXP435 opt_global.h CPU_XSCALE_PXA2X0 opt_global.h +DEV_GIC opt_global.h FLASHADDR opt_global.h GIC_DEFAULT_ICFGR_INIT opt_global.h IPI_IRQ_START opt_smp.h _______________________________________________ [email protected] mailing list http://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "[email protected]"
