Author: ian
Date: Sat May 23 17:43:02 2015
New Revision: 283318
URL: https://svnweb.freebsd.org/changeset/base/283318
Log:
MFC r279359, r279360:
For new eMMC chips, we must signal controller HC capability in OP_COND
command.
Detect, report and use 8-bit bus if is available.
Modified:
stable/10/sys/dev/mmc/mmc.c
stable/10/sys/dev/sdhci/sdhci.c
Directory Properties:
stable/10/ (props changed)
Modified: stable/10/sys/dev/mmc/mmc.c
==============================================================================
--- stable/10/sys/dev/mmc/mmc.c Sat May 23 17:30:30 2015 (r283317)
+++ stable/10/sys/dev/mmc/mmc.c Sat May 23 17:43:02 2015 (r283318)
@@ -1622,7 +1622,7 @@ mmc_go_discovery(struct mmc_softc *sc)
mmc_send_app_op_cond(sc,
(err ? 0 : MMC_OCR_CCS) | mmcbr_get_ocr(dev), NULL);
} else
- mmc_send_op_cond(sc, mmcbr_get_ocr(dev), NULL);
+ mmc_send_op_cond(sc, MMC_OCR_CCS | mmcbr_get_ocr(dev), NULL);
mmc_discover_cards(sc);
mmc_rescan_cards(sc);
Modified: stable/10/sys/dev/sdhci/sdhci.c
==============================================================================
--- stable/10/sys/dev/sdhci/sdhci.c Sat May 23 17:30:30 2015
(r283317)
+++ stable/10/sys/dev/sdhci/sdhci.c Sat May 23 17:43:02 2015
(r283318)
@@ -584,6 +584,8 @@ sdhci_init_slot(device_t dev, struct sdh
"support voltages.\n");
}
slot->host.caps = MMC_CAP_4_BIT_DATA;
+ if (caps & SDHCI_CAN_DO_8BITBUS)
+ slot->host.caps |= MMC_CAP_8_BIT_DATA;
if (caps & SDHCI_CAN_DO_HISPD)
slot->host.caps |= MMC_CAP_HSPEED;
/* Decide if we have usable DMA. */
@@ -603,9 +605,11 @@ sdhci_init_slot(device_t dev, struct sdh
slot->opt &= ~SDHCI_HAVE_DMA;
if (bootverbose || sdhci_debug) {
- slot_printf(slot, "%uMHz%s 4bits%s%s%s %s\n",
+ slot_printf(slot, "%uMHz%s %s%s%s%s %s\n",
slot->max_clk / 1000000,
(caps & SDHCI_CAN_DO_HISPD) ? " HS" : "",
+ (caps & MMC_CAP_8_BIT_DATA) ? "8bits" :
+ ((caps & MMC_CAP_4_BIT_DATA) ? "4bits" : "1bit"),
(caps & SDHCI_CAN_VDD_330) ? " 3.3V" : "",
(caps & SDHCI_CAN_VDD_300) ? " 3.0V" : "",
(caps & SDHCI_CAN_VDD_180) ? " 1.8V" : "",
@@ -692,11 +696,19 @@ sdhci_generic_update_ios(device_t brdev,
}
/* Configure the bus. */
sdhci_set_clock(slot, ios->clock);
- sdhci_set_power(slot, (ios->power_mode == power_off)?0:ios->vdd);
- if (ios->bus_width == bus_width_4)
+ sdhci_set_power(slot, (ios->power_mode == power_off) ? 0 : ios->vdd);
+ if (ios->bus_width == bus_width_8) {
+ slot->hostctrl |= SDHCI_CTRL_8BITBUS;
+ slot->hostctrl &= ~SDHCI_CTRL_4BITBUS;
+ } else if (ios->bus_width == bus_width_4) {
+ slot->hostctrl &= ~SDHCI_CTRL_8BITBUS;
slot->hostctrl |= SDHCI_CTRL_4BITBUS;
- else
+ } else if (ios->bus_width == bus_width_1) {
+ slot->hostctrl &= ~SDHCI_CTRL_8BITBUS;
slot->hostctrl &= ~SDHCI_CTRL_4BITBUS;
+ } else {
+ panic("Invalid bus width: %d", ios->bus_width);
+ }
if (ios->timing == bus_timing_hs &&
!(slot->quirks & SDHCI_QUIRK_DONT_SET_HISPD_BIT))
slot->hostctrl |= SDHCI_CTRL_HISPD;
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