Author: ian
Date: Sun May 24 18:23:57 2015
New Revision: 283499
URL: https://svnweb.freebsd.org/changeset/base/283499
Log:
MFC r282418:
On an icache sync by address/len, round the length up if the operation
spans a cacheline boundary.
Modified:
stable/10/sys/arm/arm/cpufunc_asm_armv7.S
Directory Properties:
stable/10/ (props changed)
Modified: stable/10/sys/arm/arm/cpufunc_asm_armv7.S
==============================================================================
--- stable/10/sys/arm/arm/cpufunc_asm_armv7.S Sun May 24 18:14:38 2015
(r283498)
+++ stable/10/sys/arm/arm/cpufunc_asm_armv7.S Sun May 24 18:23:57 2015
(r283499)
@@ -266,6 +266,9 @@ END(armv7_icache_sync_all)
ENTRY_NP(armv7_icache_sync_range)
ldr ip, .Larmv7_icache_line_size
ldr ip, [ip]
+ sub r3, ip, #1 /* Address need not be aligned, but */
+ and r2, r0, r3 /* round length up if op spans line */
+ add r1, r1, r2 /* boundary: len += addr & linemask; */
.Larmv7_sync_next:
mcr CP15_DCCMVAC(r0)
mcr CP15_ICIMVAU(r0)
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