Author: hselasky Date: Fri Oct 30 14:50:29 2015 New Revision: 290195 URL: https://svnweb.freebsd.org/changeset/base/290195
Log: Reduce the DWC OTG interrupt load by not reading all the host channel status registers for every interrupt. Check a common host channel status interrupt register first, then conditionally read the individual host channel status registers. Submitted by: Sebastian Huber <[email protected]> MFC after: 1 week Modified: head/sys/dev/usb/controller/dwc_otg.c Modified: head/sys/dev/usb/controller/dwc_otg.c ============================================================================== --- head/sys/dev/usb/controller/dwc_otg.c Fri Oct 30 13:05:39 2015 (r290194) +++ head/sys/dev/usb/controller/dwc_otg.c Fri Oct 30 14:50:29 2015 (r290195) @@ -2558,6 +2558,7 @@ dwc_otg_interrupt_poll_locked(struct dwc struct usb_xfer *xfer; uint32_t count; uint32_t temp; + uint32_t haint; uint8_t got_rx_status; uint8_t x; @@ -2575,14 +2576,18 @@ repeat: DPRINTF("Yield\n"); return; } + /* get all host channel interrupts */ - for (x = 0; x != sc->sc_host_ch_max; x++) { + haint = DWC_OTG_READ_4(sc, DOTG_HAINT); + while (1) { + x = ffs(haint) - 1; + if (x >= sc->sc_host_ch_max) + break; temp = DWC_OTG_READ_4(sc, DOTG_HCINT(x)); - if (temp != 0) { - DWC_OTG_WRITE_4(sc, DOTG_HCINT(x), temp); - temp &= ~HCINT_SOFTWARE_ONLY; - sc->sc_chan_state[x].hcint |= temp; - } + DWC_OTG_WRITE_4(sc, DOTG_HCINT(x), temp); + temp &= ~HCINT_SOFTWARE_ONLY; + sc->sc_chan_state[x].hcint |= temp; + haint &= ~(1U << x); } if (sc->sc_last_rx_status == 0) { _______________________________________________ [email protected] mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "[email protected]"
