Author: andrew
Date: Fri Sep 16 12:39:21 2016
New Revision: 305883

  MFC 305545:
  Only call cpu_icache_sync_range when inserting an executable page. If the
  page is non-executable the contents of the i-cache are unimportant so this
  call is just adding unneeded overhead when inserting pages.
  While doing research using gem5 with an O3 pipeline and 1k/32k/1M iTLB/L1
  iCache/L2 Bjoern Zeeb (bz@) observed a fairly high rate of calls into
  arm64_icache_sync_range() from pmap_enter() along with a high number of
  instruction fetches and iTLB/iCache hits.
  Limiting the calls to arm64_icache_sync_range() to only executable pages,
  we observe the iTLB and iCache Hit going down by about 43%. These numbers
  are quite misleading when looked at alone as at the same time instructions
  retired were reduced by 19.2% and instruction fetches were reduced by 38.8%.
  Overall this reduced the runtime of the test program by 22.4%.
  On Juno hardware, in steady-state, running the same test, using the cycle
  count to determine runtime, we do see a reduction of up to 28.9% in runtime.
  While these numbers certainly depend on the program executed, we expect an
  overall performance improvement.
  Obtained from:        ABT Systems Ltd
  Sponsored by: The FreeBSD Foundation

Directory Properties:
  stable/11/   (props changed)

Modified: stable/11/sys/arm64/arm64/pmap.c
--- stable/11/sys/arm64/arm64/pmap.c    Fri Sep 16 12:36:11 2016        
+++ stable/11/sys/arm64/arm64/pmap.c    Fri Sep 16 12:39:21 2016        
@@ -2939,8 +2939,9 @@ validate:
        pmap_invalidate_page(pmap, va);
        if (pmap != pmap_kernel()) {
-               if (pmap == &curproc->p_vmspace->vm_pmap)
-                   cpu_icache_sync_range(va, PAGE_SIZE);
+               if (pmap == &curproc->p_vmspace->vm_pmap &&
+                   (prot & VM_PROT_EXECUTE) != 0)
+                       cpu_icache_sync_range(va, PAGE_SIZE);
                if ((mpte == NULL || mpte->wire_count == NL3PG) &&
                    pmap_superpages_enabled() &&
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