Author: kib
Date: Wed Sep 28 09:43:23 2016
New Revision: 306402
URL: https://svnweb.freebsd.org/changeset/base/306402
Log:
MFC r306088:
Add amd64 functions to load/store GDT register, store IDT and TR registers.
Modified:
stable/11/sys/amd64/include/cpufunc.h
Directory Properties:
stable/11/ (props changed)
Modified: stable/11/sys/amd64/include/cpufunc.h
==============================================================================
--- stable/11/sys/amd64/include/cpufunc.h Wed Sep 28 09:41:00 2016
(r306401)
+++ stable/11/sys/amd64/include/cpufunc.h Wed Sep 28 09:43:23 2016
(r306402)
@@ -645,12 +645,36 @@ load_gs(u_short sel)
#endif
static __inline void
+bare_lgdt(struct region_descriptor *addr)
+{
+ __asm __volatile("lgdt (%0)" : : "r" (addr));
+}
+
+static __inline void
+sgdt(struct region_descriptor *addr)
+{
+ char *loc;
+
+ loc = (char *)addr;
+ __asm __volatile("sgdt %0" : "=m" (*loc) : : "memory");
+}
+
+static __inline void
lidt(struct region_descriptor *addr)
{
__asm __volatile("lidt (%0)" : : "r" (addr));
}
static __inline void
+sidt(struct region_descriptor *addr)
+{
+ char *loc;
+
+ loc = (char *)addr;
+ __asm __volatile("sidt %0" : "=m" (*loc) : : "memory");
+}
+
+static __inline void
lldt(u_short sel)
{
__asm __volatile("lldt %0" : : "r" (sel));
@@ -662,6 +686,15 @@ ltr(u_short sel)
__asm __volatile("ltr %0" : : "r" (sel));
}
+static __inline uint32_t
+read_tr(void)
+{
+ u_short sel;
+
+ __asm __volatile("str %0" : "=r" (sel));
+ return (sel);
+}
+
static __inline uint64_t
rdr0(void)
{
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