Author: kan
Date: Wed Dec 28 13:48:00 2016
New Revision: 310700
URL: https://svnweb.freebsd.org/changeset/base/310700
Log:
Be more conservative when enabling write-combining on MIPS
Some MIPS revisions do implement uncached-accelerate caching
attribute, but place extra requirement on access, such as
partial-word or out-of-sequence writes potentially having an
“unpredictable” effects.
Modified:
head/sys/mips/include/cpuregs.h
Modified: head/sys/mips/include/cpuregs.h
==============================================================================
--- head/sys/mips/include/cpuregs.h Wed Dec 28 13:28:44 2016
(r310699)
+++ head/sys/mips/include/cpuregs.h Wed Dec 28 13:48:00 2016
(r310700)
@@ -173,6 +173,7 @@
#if defined(CPU_XBURST)
#define MIPS_CCA_UA 0x01
+#define MIPS_CCA_WC MIPS_CCA_UA
#endif
#ifndef MIPS_CCA_UNCACHED
@@ -192,16 +193,6 @@
#endif
#endif
-/*
- * Use uncached-accelerated mode for write-combining maps, if one is defined,
- * otherwise fall back to uncached
- */
-#ifndef MIPS_CCA_WC
-#ifdef MIPS_CCA_UA
-#define MIPS_CCA_WC MIPS_CCA_UA
-#endif
-#endif
-
#define MIPS_PHYS_TO_XKPHYS(cca,x) \
((0x2ULL << 62) | ((unsigned long long)(cca) << 59) | (x))
#define MIPS_PHYS_TO_XKPHYS_CACHED(x) \
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