Author: marius
Date: Sun Sep 20 00:54:51 2009
New Revision: 197337
URL: http://svn.freebsd.org/changeset/base/197337

Log:
  MFC: r194134
  
  - Also probe DP83865, which is an is an ultra low power version
    of the DP83861 and DP83891.
  - Reset the PHY during attach so it's in a known state.
  - Add a comment describing why we hardwire 10baseT support in
    the BMSR.
  - Always explicitly set IFM_HDX for half-duplex. [1]
  
  Obtained from:        OpenBSD [1]

Modified:
  stable/7/sys/   (props changed)
  stable/7/sys/contrib/pf/   (props changed)
  stable/7/sys/dev/mii/miidevs
  stable/7/sys/dev/mii/nsgphy.c

Modified: stable/7/sys/dev/mii/miidevs
==============================================================================
--- stable/7/sys/dev/mii/miidevs        Sun Sep 20 00:51:48 2009        
(r197336)
+++ stable/7/sys/dev/mii/miidevs        Sun Sep 20 00:54:51 2009        
(r197337)
@@ -197,6 +197,7 @@ model NATSEMI DP83815               0x0002 DP83815 10
 model NATSEMI DP83847          0x0003 DP83847 10/100 media interface
 model NATSEMI DP83891          0x0005 DP83891 10/100/1000 media interface
 model NATSEMI DP83861          0x0006 DP83861 10/100/1000 media interface
+model NATSEMI DP83865          0x0007 DP83865 10/100/1000 media interface
 
 /* Quality Semiconductor PHYs */
 model QUALSEMI QS6612          0x0000 QS6612 10/100 media interface

Modified: stable/7/sys/dev/mii/nsgphy.c
==============================================================================
--- stable/7/sys/dev/mii/nsgphy.c       Sun Sep 20 00:51:48 2009        
(r197336)
+++ stable/7/sys/dev/mii/nsgphy.c       Sun Sep 20 00:54:51 2009        
(r197337)
@@ -41,17 +41,19 @@
 __FBSDID("$FreeBSD$");
 
 /*
- * Driver for the National Semiconductor DP83891 and DP83861
+ * Driver for the National Semiconductor DP83861, DP83865 and DP83891
  * 10/100/1000 PHYs.
  * Datasheet available at: http://www.national.com/ds/DP/DP83861.pdf
+ * and at: http://www.national.com/ds/DP/DP83865.pdf
  *
- * The DP83891 is the older NatSemi gigE PHY which isn't being sold
- * anymore. The DP83861 is its replacement, which is an 'enhanced'
- * firmware driven component. The major difference between the
- * two is that the 83891 can't generate interrupts, while the
- * 83861 can. (I think it wasn't originally designed to do this, but
- * it can now thanks to firmware updates.) The 83861 also allows
- * access to its internal RAM via indirect register access.
+ * The DP83891 is the older NS GigE PHY which isn't being sold
+ * anymore.  The DP83861 is its replacement, which is an 'enhanced'
+ * firmware driven component.  The major difference between the
+ * two is that the DP83891 can't generate interrupts, while the
+ * 83861 can (probably it wasn't originally designed to do this, but
+ * it can now thanks to firmware updates).  The DP83861 also allows
+ * access to its internal RAM via indirect register access.  The
+ * DP83865 is an ultra low power version of the DP83861 and DP83891.
  */
 
 #include <sys/param.h>
@@ -99,6 +101,7 @@ static void  nsgphy_status(struct mii_sof
 
 static const struct mii_phydesc nsgphys[] = {
        MII_PHY_DESC(NATSEMI, DP83861),
+       MII_PHY_DESC(NATSEMI, DP83865),
        MII_PHY_DESC(NATSEMI, DP83891),
        MII_PHY_END
 };
@@ -133,8 +136,14 @@ nsgphy_attach(device_t dev)
 
        mii->mii_instance++;
 
+       mii_phy_reset(sc);
+
+       /*
+        * NB: the PHY has the 10baseT BMSR bits hard-wired to 0,
+        * even though it supports 10baseT.
+        */
        sc->mii_capabilities = (PHY_READ(sc, MII_BMSR) |
-           (BMSR_10TFDX|BMSR_10THDX)) & ma->mii_capmask;
+           (BMSR_10TFDX | BMSR_10THDX)) & ma->mii_capmask;
        if (sc->mii_capabilities & BMSR_EXTSTAT)
                sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR);
 
@@ -238,7 +247,7 @@ nsgphy_status(struct mii_softc *sc)
                        return;
                }
 
-               switch (physup & (PHY_SUP_SPEED1|PHY_SUP_SPEED0)) {
+               switch (physup & (PHY_SUP_SPEED1 | PHY_SUP_SPEED0)) {
                case PHY_SUP_SPEED1:
                        mii->mii_media_active |= IFM_1000_T;
                        gtsr = PHY_READ(sc, MII_100T2SR);
@@ -257,9 +266,13 @@ nsgphy_status(struct mii_softc *sc)
                default:
                        mii->mii_media_active |= IFM_NONE;
                        mii->mii_media_status = 0;
+                       return;
                }
+
                if (physup & PHY_SUP_DUPLEX)
                        mii->mii_media_active |= IFM_FDX;
+               else
+                       mii->mii_media_active |= IFM_HDX;
        } else
                mii->mii_media_active = ife->ifm_media;
 }
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