Author: nwhitehorn Date: Sat Nov 25 22:08:40 2017 New Revision: 326210 URL: https://svnweb.freebsd.org/changeset/base/326210
Log: Definitions for registers and trap types found on new POWER CPUs. MFC after: 3 weeks Modified: head/sys/powerpc/include/spr.h head/sys/powerpc/include/trap.h Modified: head/sys/powerpc/include/spr.h ============================================================================== --- head/sys/powerpc/include/spr.h Sat Nov 25 22:06:40 2017 (r326209) +++ head/sys/powerpc/include/spr.h Sat Nov 25 22:08:40 2017 (r326210) @@ -210,6 +210,11 @@ #define EPCR_DMIUH 0x00400000 #define EPCR_PMGS 0x00200000 #define SPR_SPEFSCR 0x200 /* ..8 Signal Processing Engine FSCR. */ + +#define SPR_LPCR 0x13e /* Logical Partitioning Control */ +#define LPCR_LPES 0x008 /* Bit 60 */ +#define SPR_LPID 0x13f /* Logical Partitioning Control */ + #define SPR_IBAT0U 0x210 /* .68 Instruction BAT Reg 0 Upper */ #define SPR_IBAT0U 0x210 /* .6. Instruction BAT Reg 0 Upper */ #define SPR_IBAT0L 0x211 /* .6. Instruction BAT Reg 0 Lower */ Modified: head/sys/powerpc/include/trap.h ============================================================================== --- head/sys/powerpc/include/trap.h Sat Nov 25 22:06:40 2017 (r326209) +++ head/sys/powerpc/include/trap.h Sat Nov 25 22:08:40 2017 (r326210) @@ -77,6 +77,7 @@ #define EXC_DSMISS 0x1200 /* Data store translation miss */ /* Power ISA 2.06+: */ +#define EXC_HEA 0x0e40 /* Hypervisor Emulation Assistance */ #define EXC_VSX 0x0f40 /* VSX Unavailable */ /* The following are available on 4xx and 85xx */ _______________________________________________ [email protected] mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-all To unsubscribe, send any mail to "[email protected]"
