Author: markj
Date: Fri Jul 13 20:56:20 2018
New Revision: 336263
URL: https://svnweb.freebsd.org/changeset/base/336263
Log:
Use the existing MSR_BIOS_SIGN on AMD.
Reported by: kib
Sponsored by: The FreeBSD Foundation
Modified:
head/sys/x86/include/specialreg.h
head/usr.sbin/cpucontrol/amd10h.c
Modified: head/sys/x86/include/specialreg.h
==============================================================================
--- head/sys/x86/include/specialreg.h Fri Jul 13 20:33:10 2018
(r336262)
+++ head/sys/x86/include/specialreg.h Fri Jul 13 20:56:20 2018
(r336263)
@@ -973,7 +973,6 @@
#define AMD_WT_ALLOC_FRE 0x10000 /* fixed (A0000-FFFFF) range
enable */
/* AMD64 MSR's */
-#define MSR_PATCH_LEVEL 0x0000008b /* microcode revision number */
#define MSR_EFER 0xc0000080 /* extended features */
#define MSR_STAR 0xc0000081 /* legacy mode SYSCALL
target/cs/ss */
#define MSR_LSTAR 0xc0000082 /* long mode SYSCALL target rip
*/
Modified: head/usr.sbin/cpucontrol/amd10h.c
==============================================================================
--- head/usr.sbin/cpucontrol/amd10h.c Fri Jul 13 20:33:10 2018
(r336262)
+++ head/usr.sbin/cpucontrol/amd10h.c Fri Jul 13 20:56:20 2018
(r336263)
@@ -129,7 +129,7 @@ amd10h_update(const char *dev, const char *path)
}
signature = idargs.data[0];
- msrargs.msr = MSR_PATCH_LEVEL;
+ msrargs.msr = MSR_BIOS_SIGN;
error = ioctl(devfd, CPUCTL_RDMSR, &msrargs);
if (error < 0) {
WARN(0, "ioctl(%s)", dev);
@@ -295,7 +295,7 @@ amd10h_update(const char *dev, const char *path)
fprintf(stderr, "done.\n");
}
- msrargs.msr = MSR_PATCH_LEVEL;
+ msrargs.msr = MSR_BIOS_SIGN;
error = ioctl(devfd, CPUCTL_RDMSR, &msrargs);
if (error < 0) {
WARN(0, "ioctl(%s)", dev);
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