Author: kib
Date: Fri Aug  3 11:36:37 2018
New Revision: 337235
URL: https://svnweb.freebsd.org/changeset/base/337235

Log:
  MFC r336763:
  Add workarounds for several Ryzen erratas, on amd64.

Modified:
  stable/11/sys/amd64/amd64/initcpu.c
  stable/11/sys/x86/x86/cpu_machdep.c
Directory Properties:
  stable/11/   (props changed)

Modified: stable/11/sys/amd64/amd64/initcpu.c
==============================================================================
--- stable/11/sys/amd64/amd64/initcpu.c Fri Aug  3 10:59:05 2018        
(r337234)
+++ stable/11/sys/amd64/amd64/initcpu.c Fri Aug  3 11:36:37 2018        
(r337235)
@@ -128,6 +128,30 @@ init_amd(void)
                }
        }
 
+       /* Ryzen erratas. */
+       if (CPUID_TO_FAMILY(cpu_id) == 0x17 && CPUID_TO_MODEL(cpu_id) == 0x1 &&
+           (cpu_feature2 & CPUID2_HV) == 0) {
+               /* 1021 */
+               msr = rdmsr(0xc0011029);
+               msr |= 0x2000;
+               wrmsr(0xc0011029, msr);
+
+               /* 1033 */
+               msr = rdmsr(0xc0011020);
+               msr |= 0x10;
+               wrmsr(0xc0011020, msr);
+
+               /* 1049 */
+               msr = rdmsr(0xc0011028);
+               msr |= 0x10;
+               wrmsr(0xc0011028, msr);
+
+               /* 1095 */
+               msr = rdmsr(0xc0011020);
+               msr |= 0x200000000000000;
+               wrmsr(0xc0011020, msr);
+       }
+
        /*
         * Work around a problem on Ryzen that is triggered by executing
         * code near the top of user memory, in our case the signal

Modified: stable/11/sys/x86/x86/cpu_machdep.c
==============================================================================
--- stable/11/sys/x86/x86/cpu_machdep.c Fri Aug  3 10:59:05 2018        
(r337234)
+++ stable/11/sys/x86/x86/cpu_machdep.c Fri Aug  3 11:36:37 2018        
(r337235)
@@ -739,6 +739,13 @@ cpu_idle_tun(void *unused __unused)
 
        if (TUNABLE_STR_FETCH("machdep.idle", tunvar, sizeof(tunvar)))
                cpu_idle_selector(tunvar);
+       else if (cpu_vendor_id == CPU_VENDOR_AMD &&
+           CPUID_TO_FAMILY(cpu_id) == 0x17 && CPUID_TO_MODEL(cpu_id) == 0x1) {
+               /* Ryzen erratas 1057, 1109. */
+               cpu_idle_selector("hlt");
+               idle_mwait = 0;
+       }
+
        if (cpu_vendor_id == CPU_VENDOR_INTEL && cpu_id == 0x506c9) {
                /*
                 * Apollo Lake errata APL31 (public errata APL30).
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