Author: jhb
Date: Mon Sep 17 18:45:16 2018
New Revision: 338727
URL: https://svnweb.freebsd.org/changeset/base/338727
Log:
MFC 335913:
Use 'e' instead of 'i' constraints with 64-bit atomic operations on amd64.
The ADD, AND, OR, and SUB instructions take at most a 32-bit
sign-extended immediate operand. 64-bit constants that do not fit into
that constraint need to be loaded into a register. The 'i' constraint
tells the compiler it can pass any integer constant to the assembler,
whereas the 'e' constrain only permits constants that fit into a 32-bit
sign-extended value. This fixes using
atomic_add/clear/set/subtract_long/64 with constants that do not fit into
a 32-bit sign-extended immediate.
Modified:
stable/11/sys/amd64/include/atomic.h
Directory Properties:
stable/11/ (props changed)
Modified: stable/11/sys/amd64/include/atomic.h
==============================================================================
--- stable/11/sys/amd64/include/atomic.h Mon Sep 17 18:36:29 2018
(r338726)
+++ stable/11/sys/amd64/include/atomic.h Mon Sep 17 18:45:16 2018
(r338727)
@@ -444,10 +444,10 @@ ATOMIC_ASM(clear, int, "andl %1,%0", "ir", ~v);
ATOMIC_ASM(add, int, "addl %1,%0", "ir", v);
ATOMIC_ASM(subtract, int, "subl %1,%0", "ir", v);
-ATOMIC_ASM(set, long, "orq %1,%0", "ir", v);
-ATOMIC_ASM(clear, long, "andq %1,%0", "ir", ~v);
-ATOMIC_ASM(add, long, "addq %1,%0", "ir", v);
-ATOMIC_ASM(subtract, long, "subq %1,%0", "ir", v);
+ATOMIC_ASM(set, long, "orq %1,%0", "er", v);
+ATOMIC_ASM(clear, long, "andq %1,%0", "er", ~v);
+ATOMIC_ASM(add, long, "addq %1,%0", "er", v);
+ATOMIC_ASM(subtract, long, "subq %1,%0", "er", v);
#define ATOMIC_LOADSTORE(TYPE) \
ATOMIC_LOAD(TYPE); \
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