Author: hselasky
Date: Wed Dec 12 12:54:43 2018
New Revision: 341966
URL: https://svnweb.freebsd.org/changeset/base/341966
Log:
MFC r341576:
mlx5fpga: Add set and query connect/disconnect FPGA
Submitted by: kib@
Sponsored by: Mellanox Technologies
Modified:
stable/11/sys/dev/mlx5/mlx5_fpga/cmd.h
stable/11/sys/dev/mlx5/mlx5_fpga/core.h
stable/11/sys/dev/mlx5/mlx5_fpga/mlx5_ifc_fpga.h
stable/11/sys/dev/mlx5/mlx5_fpga/mlx5fpga_cmd.c
stable/11/sys/dev/mlx5/mlx5_fpga/mlx5fpga_sdk.c
stable/11/sys/dev/mlx5/mlx5_fpga/sdk.h
stable/11/sys/dev/mlx5/mlx5_fpga_tools/mlx5fpga_tools_char.c
stable/11/sys/dev/mlx5/mlx5io.h
Directory Properties:
stable/11/ (props changed)
Modified: stable/11/sys/dev/mlx5/mlx5_fpga/cmd.h
==============================================================================
--- stable/11/sys/dev/mlx5/mlx5_fpga/cmd.h Wed Dec 12 12:54:21 2018
(r341965)
+++ stable/11/sys/dev/mlx5/mlx5_fpga/cmd.h Wed Dec 12 12:54:43 2018
(r341966)
@@ -69,6 +69,8 @@ int mlx5_fpga_sbu_caps(struct mlx5_core_dev *dev, void
int mlx5_fpga_load(struct mlx5_core_dev *dev, enum mlx5_fpga_image image);
int mlx5_fpga_image_select(struct mlx5_core_dev *dev,
enum mlx5_fpga_image image);
+int mlx5_fpga_ctrl_connect(struct mlx5_core_dev *dev,
+ enum mlx5_fpga_connect *connect);
int mlx5_fpga_shell_counters(struct mlx5_core_dev *dev, bool clear,
struct mlx5_fpga_shell_counters *data);
Modified: stable/11/sys/dev/mlx5/mlx5_fpga/core.h
==============================================================================
--- stable/11/sys/dev/mlx5/mlx5_fpga/core.h Wed Dec 12 12:54:21 2018
(r341965)
+++ stable/11/sys/dev/mlx5/mlx5_fpga/core.h Wed Dec 12 12:54:43 2018
(r341966)
@@ -52,6 +52,7 @@ enum mlx5_fdev_state {
MLX5_FDEV_STATE_SUCCESS = 0,
MLX5_FDEV_STATE_FAILURE = 1,
MLX5_FDEV_STATE_IN_PROGRESS = 2,
+ MLX5_FDEV_STATE_DISCONNECTED = 3,
MLX5_FDEV_STATE_NONE = 0xFFFF,
};
Modified: stable/11/sys/dev/mlx5/mlx5_fpga/mlx5_ifc_fpga.h
==============================================================================
--- stable/11/sys/dev/mlx5/mlx5_fpga/mlx5_ifc_fpga.h Wed Dec 12 12:54:21
2018 (r341965)
+++ stable/11/sys/dev/mlx5/mlx5_fpga/mlx5_ifc_fpga.h Wed Dec 12 12:54:43
2018 (r341966)
@@ -133,6 +133,8 @@ enum {
MLX5_FPGA_CTRL_OPERATION_SANDBOX_BYPASS_ON = 0x4,
MLX5_FPGA_CTRL_OPERATION_SANDBOX_BYPASS_OFF = 0x5,
MLX5_FPGA_CTRL_OPERATION_RESET_SANDBOX = 0x6,
+ MLX5_FPGA_CTRL_OPERATION_DISCONNECT = 0x9,
+ MLX5_FPGA_CTRL_OPERATION_CONNECT = 0xA,
};
struct mlx5_ifc_fpga_ctrl_bits {
Modified: stable/11/sys/dev/mlx5/mlx5_fpga/mlx5fpga_cmd.c
==============================================================================
--- stable/11/sys/dev/mlx5/mlx5_fpga/mlx5fpga_cmd.c Wed Dec 12 12:54:21
2018 (r341965)
+++ stable/11/sys/dev/mlx5/mlx5_fpga/mlx5fpga_cmd.c Wed Dec 12 12:54:43
2018 (r341966)
@@ -37,6 +37,7 @@
#include <dev/mlx5/device.h>
#include <dev/mlx5/mlx5_core/mlx5_core.h>
#include <dev/mlx5/mlx5_fpga/cmd.h>
+#include <dev/mlx5/mlx5_fpga/core.h>
#define MLX5_FPGA_ACCESS_REG_SZ (MLX5_ST_SZ_DW(fpga_access_reg) + \
MLX5_FPGA_ACCESS_REG_SIZE_MAX)
@@ -162,6 +163,33 @@ int mlx5_fpga_query(struct mlx5_core_dev *dev, struct
query->admin_image = MLX5_GET(fpga_ctrl, out, flash_select_admin);
query->oper_image = MLX5_GET(fpga_ctrl, out, flash_select_oper);
return 0;
+}
+
+int mlx5_fpga_ctrl_connect(struct mlx5_core_dev *dev,
+ enum mlx5_fpga_connect *connect)
+{
+ u32 in[MLX5_ST_SZ_DW(fpga_ctrl)] = {0};
+ u32 out[MLX5_ST_SZ_DW(fpga_ctrl)];
+ int status;
+ int err;
+
+ if (*connect == MLX5_FPGA_CONNECT_QUERY) {
+ err = mlx5_core_access_reg(dev, in, sizeof(in), out,
+ sizeof(out), MLX5_REG_FPGA_CTRL,
+ 0, false);
+ if (err)
+ return err;
+ status = MLX5_GET(fpga_ctrl, out, status);
+ *connect = (status == MLX5_FDEV_STATE_DISCONNECTED) ?
+ MLX5_FPGA_CONNECT_DISCONNECT :
+ MLX5_FPGA_CONNECT_CONNECT;
+ } else {
+ MLX5_SET(fpga_ctrl, in, operation, *connect);
+ err = mlx5_core_access_reg(dev, in, sizeof(in), out,
+ sizeof(out), MLX5_REG_FPGA_CTRL,
+ 0, true);
+ }
+ return err;
}
int mlx5_fpga_query_mtmp(struct mlx5_core_dev *dev,
Modified: stable/11/sys/dev/mlx5/mlx5_fpga/mlx5fpga_sdk.c
==============================================================================
--- stable/11/sys/dev/mlx5/mlx5_fpga/mlx5fpga_sdk.c Wed Dec 12 12:54:21
2018 (r341965)
+++ stable/11/sys/dev/mlx5/mlx5_fpga/mlx5fpga_sdk.c Wed Dec 12 12:54:43
2018 (r341966)
@@ -342,6 +342,7 @@ int mlx5_fpga_device_reload(struct mlx5_fpga_device *f
break;
case MLX5_FDEV_STATE_SUCCESS:
case MLX5_FDEV_STATE_FAILURE:
+ case MLX5_FDEV_STATE_DISCONNECTED:
break;
}
spin_unlock_irqrestore(&fdev->state_lock, flags);
@@ -426,6 +427,7 @@ int mlx5_fpga_flash_select(struct mlx5_fpga_device *fd
case MLX5_FDEV_STATE_NONE:
spin_unlock_irqrestore(&fdev->state_lock, flags);
return -ENODEV;
+ case MLX5_FDEV_STATE_DISCONNECTED:
case MLX5_FDEV_STATE_IN_PROGRESS:
case MLX5_FDEV_STATE_SUCCESS:
case MLX5_FDEV_STATE_FAILURE:
@@ -441,6 +443,32 @@ int mlx5_fpga_flash_select(struct mlx5_fpga_device *fd
return err;
}
EXPORT_SYMBOL(mlx5_fpga_flash_select);
+
+int mlx5_fpga_connectdisconnect(struct mlx5_fpga_device *fdev,
+ enum mlx5_fpga_connect *connect)
+{
+ unsigned long flags;
+ int err;
+
+ spin_lock_irqsave(&fdev->state_lock, flags);
+ switch (fdev->fdev_state) {
+ case MLX5_FDEV_STATE_NONE:
+ spin_unlock_irqrestore(&fdev->state_lock, flags);
+ return -ENODEV;
+ case MLX5_FDEV_STATE_IN_PROGRESS:
+ case MLX5_FDEV_STATE_SUCCESS:
+ case MLX5_FDEV_STATE_FAILURE:
+ case MLX5_FDEV_STATE_DISCONNECTED:
+ break;
+ }
+ spin_unlock_irqrestore(&fdev->state_lock, flags);
+
+ err = mlx5_fpga_ctrl_connect(fdev->mdev, connect);
+ if (err)
+ mlx5_fpga_err(fdev, "Failed to connect/disconnect: %d\n", err);
+ return err;
+}
+EXPORT_SYMBOL(mlx5_fpga_connectdisconnect);
int mlx5_fpga_temperature(struct mlx5_fpga_device *fdev,
struct mlx5_fpga_temperature *temp)
Modified: stable/11/sys/dev/mlx5/mlx5_fpga/sdk.h
==============================================================================
--- stable/11/sys/dev/mlx5/mlx5_fpga/sdk.h Wed Dec 12 12:54:21 2018
(r341965)
+++ stable/11/sys/dev/mlx5/mlx5_fpga/sdk.h Wed Dec 12 12:54:43 2018
(r341966)
@@ -366,6 +366,16 @@ int mlx5_fpga_temperature(struct mlx5_fpga_device *fde
struct mlx5_fpga_temperature *temp);
/**
+ * mlx5_fpga_connectdisconnect() - Connect/disconnect ConnectX to FPGA
+ * @fdev: The FPGA device
+
+ * Return: 0 if successful
+ * or any other error value otherwise.
+ */
+int mlx5_fpga_connectdisconnect(struct mlx5_fpga_device *fdev,
+ enum mlx5_fpga_connect *connect);
+
+/**
* mlx5_fpga_get_cap() - Returns the FPGA cap mailbox from FW without parsing.
* @fdev: The FPGA device
* @fpga_caps: Is an array with a length of according to the size of
Modified: stable/11/sys/dev/mlx5/mlx5_fpga_tools/mlx5fpga_tools_char.c
==============================================================================
--- stable/11/sys/dev/mlx5/mlx5_fpga_tools/mlx5fpga_tools_char.c Wed Dec
12 12:54:21 2018 (r341965)
+++ stable/11/sys/dev/mlx5/mlx5_fpga_tools/mlx5fpga_tools_char.c Wed Dec
12 12:54:43 2018 (r341966)
@@ -201,6 +201,7 @@ tools_char_ioctl(struct cdev *dev, u_long cmd, caddr_t
struct mlx5_fpga_device *fdev;
struct mlx5_fpga_query query;
struct mlx5_fpga_temperature *temperature;
+ enum mlx5_fpga_connect *connect;
u32 fpga_cap[MLX5_ST_SZ_DW(fpga_cap)] = {0};
int arg, err;
@@ -260,6 +261,11 @@ tools_char_ioctl(struct cdev *dev, u_long cmd, caddr_t
mlx5_fpga_temperature(fdev, temperature);
err = 0; /* XXXKIB */
break;
+ case MLX5_FPGA_CONNECT:
+ connect = (enum mlx5_fpga_connect *)data;
+ mlx5_fpga_connectdisconnect(fdev, connect);
+ err = 0; /* XXXKIB */
+ break;
default:
dev_err(mlx5_fpga_dev(fdev),
"unknown ioctl command %#08lx\n", cmd);
Modified: stable/11/sys/dev/mlx5/mlx5io.h
==============================================================================
--- stable/11/sys/dev/mlx5/mlx5io.h Wed Dec 12 12:54:21 2018
(r341965)
+++ stable/11/sys/dev/mlx5/mlx5io.h Wed Dec 12 12:54:43 2018
(r341966)
@@ -90,6 +90,12 @@ enum mlx5_fpga_tee {
MLX5_FPGA_TEE_GENERATE_SINGLE_EVENT = 2,
};
+enum mlx5_fpga_connect {
+ MLX5_FPGA_CONNECT_QUERY = 0,
+ MLX5_FPGA_CONNECT_DISCONNECT = 0x9,
+ MLX5_FPGA_CONNECT_CONNECT = 0xA,
+};
+
/**
* enum mlx5_fpga_access_type - Enumerated the different methods possible for
* accessing the device memory address space
@@ -128,6 +134,7 @@ struct mlx5_fpga_temperature {
#define MLX5_FPGA_QUERY _IOR('m', 0x84, struct mlx5_fpga_query)
#define MLX5_FPGA_CAP _IOR('m', 0x85,
uint32_t[MLX5_FPGA_CAP_ARR_SZ])
#define MLX5_FPGA_TEMPERATURE _IOWR('m', 0x86, struct
mlx5_fpga_temperature)
+#define MLX5_FPGA_CONNECT _IOWR('m', 0x87, enum mlx5_fpga_connect)
#define MLX5_FPGA_TOOLS_NAME_SUFFIX "_mlx5_fpga_tools"
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