Author: jhibbits
Date: Sat Jul 20 18:22:01 2019
New Revision: 350181
URL: https://svnweb.freebsd.org/changeset/base/350181
Log:
powerpc/SPE: Enable SPV bit for EFSCFD instruction emulation
EFSCFD (floating point single convert from double) emulation requires saving
the high word of the register, which uses SPE instructions. Enable the SPE
to avoid an SPV Unavailable exception.
MFC after: 1 week
Modified:
head/sys/powerpc/booke/spe.c
Modified: head/sys/powerpc/booke/spe.c
==============================================================================
--- head/sys/powerpc/booke/spe.c Sat Jul 20 17:42:46 2019
(r350180)
+++ head/sys/powerpc/booke/spe.c Sat Jul 20 18:22:01 2019
(r350181)
@@ -572,6 +572,7 @@ spe_handle_fpdata(struct trapframe *frame)
frame->fixreg[rd] = frame->fixreg[ra] ^ (1U << 31);
break;
case EFSCFD:
+ mtmsr(msr | PSL_VEC);
spe_explode(&fpemu, &fpemu.fe_f3, DOUBLE,
spe_save_reg_high(rb), frame->fixreg[rb]);
result = &fpemu.fe_f3;
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