Author: manu
Date: Thu Nov 28 18:02:13 2019
New Revision: 355179
URL: https://svnweb.freebsd.org/changeset/base/355179

Log:
  MFC r353524-r353527, r353534
  
  r353524:
  aw_ccung: Add more debug printfs
  
  No functional changes
  
  r353525:
  arm64: allwinner: Add new clock aw_clk_np
  
  This is a clock type present in Allwinner H6 where the formula is :
  f = fparent * N / P
  
  r353526:
  arm64: allwinner: Add aw_clk_nmm clock
  
  This is a clock type present on Allwinner H6 where the formula is :
  f = fparent * n / m0 / m1
  
  r353527:
  arm: allwinner: Disable the clock before changing it's freq
  
  You aren't supposed to changing the freq of a clock when it is
  enable so disable the clock before changing the freq and then
  re-enable it.
  
  r353534:
  arm: allwinner: Add np and nmm clock file to the build

Added:
  stable/12/sys/arm/allwinner/clkng/aw_clk_nmm.c
     - copied unchanged from r353527, head/sys/arm/allwinner/clkng/aw_clk_nmm.c
  stable/12/sys/arm/allwinner/clkng/aw_clk_nmm.h
     - copied unchanged from r353527, head/sys/arm/allwinner/clkng/aw_clk_nmm.h
  stable/12/sys/arm/allwinner/clkng/aw_clk_np.c
     - copied unchanged from r353527, head/sys/arm/allwinner/clkng/aw_clk_np.c
  stable/12/sys/arm/allwinner/clkng/aw_clk_np.h
     - copied unchanged from r353527, head/sys/arm/allwinner/clkng/aw_clk_np.h
Modified:
  stable/12/sys/arm/allwinner/aw_mmc.c
  stable/12/sys/arm/allwinner/clkng/aw_ccung.c
  stable/12/sys/arm/allwinner/clkng/aw_ccung.h
  stable/12/sys/arm/allwinner/clkng/aw_clk.h
  stable/12/sys/arm/allwinner/files.allwinner
  stable/12/sys/conf/files.arm64
Directory Properties:
  stable/12/   (props changed)

Modified: stable/12/sys/arm/allwinner/aw_mmc.c
==============================================================================
--- stable/12/sys/arm/allwinner/aw_mmc.c        Thu Nov 28 17:52:25 2019        
(r355178)
+++ stable/12/sys/arm/allwinner/aw_mmc.c        Thu Nov 28 18:02:13 2019        
(r355179)
@@ -1424,6 +1424,10 @@ aw_mmc_update_ios(device_t bus, device_t child)
                }
 
                /* Set the MMC clock. */
+               error = clk_disable(sc->aw_clk_mmc);
+               if (error != 0 && bootverbose)
+                       device_printf(sc->aw_dev,
+                         "failed to disable mmc clock: %d\n", error);
                error = clk_set_freq(sc->aw_clk_mmc, clock,
                    CLK_SET_ROUND_DOWN);
                if (error != 0) {
@@ -1432,6 +1436,10 @@ aw_mmc_update_ios(device_t bus, device_t child)
                            clock, error);
                        return (error);
                }
+               error = clk_enable(sc->aw_clk_mmc);
+               if (error != 0 && bootverbose)
+                       device_printf(sc->aw_dev,
+                         "failed to re-enable mmc clock: %d\n", error);
 
                if (sc->aw_mmc_conf->can_calibrate)
                        AW_MMC_WRITE_4(sc, AW_MMC_SAMP_DL, 
AW_MMC_SAMP_DL_SW_EN);

Modified: stable/12/sys/arm/allwinner/clkng/aw_ccung.c
==============================================================================
--- stable/12/sys/arm/allwinner/clkng/aw_ccung.c        Thu Nov 28 17:52:25 
2019        (r355178)
+++ stable/12/sys/arm/allwinner/clkng/aw_ccung.c        Thu Nov 28 18:02:13 
2019        (r355179)
@@ -130,10 +130,12 @@ aw_ccung_reset_assert(device_t dev, intptr_t id, bool 
 
        mtx_lock(&sc->mtx);
        val = CCU_READ4(sc, sc->resets[id].offset);
+       dprintf("offset=%x Read %x\n", sc->resets[id].offset, val);
        if (reset)
                val &= ~(1 << sc->resets[id].shift);
        else
                val |= 1 << sc->resets[id].shift;
+       dprintf("offset=%x Write %x\n", sc->resets[id].offset, val);
        CCU_WRITE4(sc, sc->resets[id].offset, val);
        mtx_unlock(&sc->mtx);
 
@@ -153,6 +155,7 @@ aw_ccung_reset_is_asserted(device_t dev, intptr_t id, 
 
        mtx_lock(&sc->mtx);
        val = CCU_READ4(sc, sc->resets[id].offset);
+       dprintf("offset=%x Read %x\n", sc->resets[id].offset, val);
        *reset = (val & (1 << sc->resets[id].shift)) != 0 ? false : true;
        mtx_unlock(&sc->mtx);
 
@@ -311,6 +314,13 @@ aw_ccung_attach(device_t dev)
                        break;
                case AW_CLK_MIPI:
                        aw_clk_mipi_register(sc->clkdom, sc->clks[i].clk.mipi);
+                       break;
+               case AW_CLK_NP:
+                       aw_clk_np_register(sc->clkdom, sc->clks[i].clk.np);
+                       break;
+               case AW_CLK_NMM:
+                       aw_clk_nmm_register(sc->clkdom, sc->clks[i].clk.nmm);
+                       break;
                }
        }
 

Modified: stable/12/sys/arm/allwinner/clkng/aw_ccung.h
==============================================================================
--- stable/12/sys/arm/allwinner/clkng/aw_ccung.h        Thu Nov 28 17:52:25 
2019        (r355178)
+++ stable/12/sys/arm/allwinner/clkng/aw_ccung.h        Thu Nov 28 18:02:13 
2019        (r355179)
@@ -35,6 +35,8 @@
 #include <arm/allwinner/clkng/aw_clk_mipi.h>
 #include <arm/allwinner/clkng/aw_clk_nkmp.h>
 #include <arm/allwinner/clkng/aw_clk_nm.h>
+#include <arm/allwinner/clkng/aw_clk_nmm.h>
+#include <arm/allwinner/clkng/aw_clk_np.h>
 #include <arm/allwinner/clkng/aw_clk_prediv_mux.h>
 #include <arm/allwinner/clkng/aw_clk_frac.h>
 #include <dev/extres/clk/clk_mux.h>
@@ -52,6 +54,8 @@ enum aw_ccung_clk_type {
        AW_CLK_FRAC,
        AW_CLK_M,
        AW_CLK_MIPI,
+       AW_CLK_NP,
+       AW_CLK_NMM,
 };
 
 struct aw_ccung_clk {
@@ -66,6 +70,8 @@ struct aw_ccung_clk {
                struct aw_clk_frac_def          *frac;
                struct aw_clk_m_def             *m;
                struct aw_clk_mipi_def          *mipi;
+               struct aw_clk_np_def            *np;
+               struct aw_clk_nmm_def           *nmm;
        } clk;
 };
 

Modified: stable/12/sys/arm/allwinner/clkng/aw_clk.h
==============================================================================
--- stable/12/sys/arm/allwinner/clkng/aw_clk.h  Thu Nov 28 17:52:25 2019        
(r355178)
+++ stable/12/sys/arm/allwinner/clkng/aw_clk.h  Thu Nov 28 18:02:13 2019        
(r355179)
@@ -407,6 +407,69 @@ aw_clk_factor_get_value(struct aw_clk_factor *factor, 
                .flags = _flags,                        \
        }
 
+#define NMM_CLK(_clkname, _id, _name, _pnames,         \
+     _offset,                                          \
+     _nshift, _nwidth, _nvalue, _nflags,               \
+    _m0shift, _m0width, _m0value, _m0flags,            \
+    _m1shift, _m1width, _m1value, _m1flags,            \
+    _gate_shift,                                       \
+    _lock, _lock_retries,                              \
+    _flags)                                            \
+       static struct aw_clk_nmm_def _clkname = {       \
+               .clkdef = {                             \
+                       .id = _id,                      \
+                       .name = _name,                  \
+                       .parent_names = _pnames,        \
+                       .parent_cnt = nitems(_pnames),  \
+               },                                      \
+               .offset = _offset,                      \
+               .n.shift = _nshift,                     \
+               .n.width = _nwidth,                     \
+               .n.value = _nvalue,                     \
+               .n.flags = _nflags,                     \
+               .m0.shift = _m0shift,                   \
+               .m0.width = _m0width,                   \
+               .m0.value = _m0value,                   \
+               .m0.flags = _m0flags,                   \
+               .m1.shift = _m1shift,                   \
+               .m1.width = _m1width,                   \
+               .m1.value = _m1value,                   \
+               .m1.flags = _m1flags,                   \
+               .gate_shift = _gate_shift,              \
+               .lock_shift = _lock,                    \
+               .lock_retries = _lock_retries,          \
+               .flags = _flags,                        \
+       }
+
+#define NP_CLK(_clkname, _id, _name, _pnames,          \
+     _offset,                                          \
+     _nshift, _nwidth, _nvalue, _nflags,               \
+     _pshift, _pwidth, _pvalue, _pflags,               \
+    _gate_shift,                                       \
+    _lock, _lock_retries,                              \
+    _flags)                                            \
+       static struct aw_clk_np_def _clkname =  {       \
+               .clkdef = {                             \
+                       .id = _id,                      \
+                       .name = _name,                  \
+                       .parent_names = _pnames,        \
+                       .parent_cnt = nitems(_pnames),  \
+               },                                      \
+               .offset = _offset,                      \
+               .n.shift = _nshift,                     \
+               .n.width = _nwidth,                     \
+               .n.value = _nvalue,                     \
+               .n.flags = _nflags,                     \
+               .p.shift = _pshift,                     \
+               .p.width = _pwidth,                     \
+               .p.value = _pvalue,                     \
+               .p.flags = _pflags,                     \
+               .gate_shift = _gate_shift,              \
+               .lock_shift = _lock,                    \
+               .lock_retries = _lock_retries,          \
+               .flags = _flags,                        \
+       }
+
 #define PREDIV_CLK(_clkname, _id, _name, _pnames,      \
   _offset,     \
   _mux_shift, _mux_width,      \

Copied: stable/12/sys/arm/allwinner/clkng/aw_clk_nmm.c (from r353527, 
head/sys/arm/allwinner/clkng/aw_clk_nmm.c)
==============================================================================
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ stable/12/sys/arm/allwinner/clkng/aw_clk_nmm.c      Thu Nov 28 18:02:13 
2019        (r355179, copy of r353527, 
head/sys/arm/allwinner/clkng/aw_clk_nmm.c)
@@ -0,0 +1,285 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
+ *
+ * Copyright (c) 2019 Emmanuel Vadot <[email protected]>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/bus.h>
+
+#include <dev/extres/clk/clk.h>
+
+#include <arm/allwinner/clkng/aw_clk.h>
+#include <arm/allwinner/clkng/aw_clk_nmm.h>
+
+#include "clkdev_if.h"
+
+/*
+ * clknode for clocks matching the formula :
+ *
+ * clk = clkin * n / m0 / m1
+ *
+ */
+
+struct aw_clk_nmm_sc {
+       uint32_t        offset;
+
+       struct aw_clk_factor    n;
+       struct aw_clk_factor    m0;
+       struct aw_clk_factor    m1;
+
+       uint32_t        gate_shift;
+       uint32_t        lock_shift;
+       uint32_t        lock_retries;
+
+       uint32_t        flags;
+};
+
+#define        WRITE4(_clk, off, val)                                          
\
+       CLKDEV_WRITE_4(clknode_get_device(_clk), off, val)
+#define        READ4(_clk, off, val)                                           
\
+       CLKDEV_READ_4(clknode_get_device(_clk), off, val)
+#define        DEVICE_LOCK(_clk)                                               
        \
+       CLKDEV_DEVICE_LOCK(clknode_get_device(_clk))
+#define        DEVICE_UNLOCK(_clk)                                             
\
+       CLKDEV_DEVICE_UNLOCK(clknode_get_device(_clk))
+
+static int
+aw_clk_nmm_init(struct clknode *clk, device_t dev)
+{
+       struct aw_clk_nmm_sc *sc;
+
+       sc = clknode_get_softc(clk);
+
+       clknode_init_parent_idx(clk, 0);
+       return (0);
+}
+
+static int
+aw_clk_nmm_set_gate(struct clknode *clk, bool enable)
+{
+       struct aw_clk_nmm_sc *sc;
+       uint32_t val;
+
+       sc = clknode_get_softc(clk);
+
+       if ((sc->flags & AW_CLK_HAS_GATE) == 0)
+               return (0);
+
+       DEVICE_LOCK(clk);
+       READ4(clk, sc->offset, &val);
+       if (enable)
+               val |= (1 << sc->gate_shift);
+       else
+               val &= ~(1 << sc->gate_shift);
+       WRITE4(clk, sc->offset, val);
+       DEVICE_UNLOCK(clk);
+
+       return (0);
+}
+
+static uint64_t
+aw_clk_nmm_find_best(struct aw_clk_nmm_sc *sc, uint64_t fparent, uint64_t 
*fout,
+  uint32_t *factor_n, uint32_t *factor_m0, uint32_t *factor_m1)
+{
+       uint64_t cur, best;
+       uint32_t n, m0, m1;
+       uint32_t max_n, max_m0, max_m1;
+       uint32_t min_n, min_m0, min_m1;
+
+       *factor_n = *factor_m0 = *factor_m1 = 0;
+
+       max_n = aw_clk_factor_get_max(&sc->n);
+       min_n = aw_clk_factor_get_min(&sc->n);
+       max_m0 = aw_clk_factor_get_max(&sc->m0);
+       min_m0 = aw_clk_factor_get_min(&sc->m0);
+       max_m1 = aw_clk_factor_get_max(&sc->m1);
+       min_m1 = aw_clk_factor_get_min(&sc->m1);
+
+       for (m0 = min_m0; m0 <= max_m0; ) {
+               for (m1 = min_m1; m1 <= max_m1; ) {
+                       for (n = min_n; n <= max_n; ) {
+                               cur = fparent * n / m0 / m1;
+                               if (abs(*fout - cur) < abs(*fout - best)) {
+                                       best = cur;
+                                       *factor_n = n;
+                                       *factor_m0 = m0;
+                                       *factor_m1 = m1;
+                               }
+                               n++;
+                       }
+                       m1++;
+               }
+               m0++;
+       }
+
+       return (best);
+}
+
+static int
+aw_clk_nmm_set_freq(struct clknode *clk, uint64_t fparent, uint64_t *fout,
+    int flags, int *stop)
+{
+       struct aw_clk_nmm_sc *sc;
+       uint64_t cur, best;
+       uint32_t val, n, m0, m1, best_n, best_m0, best_m1;
+       int retry;
+
+       sc = clknode_get_softc(clk);
+
+       best = cur = 0;
+
+       best = aw_clk_nmm_find_best(sc, fparent, fout,
+           &best_n, &best_m0, &best_m1);
+
+       if ((flags & CLK_SET_DRYRUN) != 0) {
+               *fout = best;
+               *stop = 1;
+               return (0);
+       }
+
+       if ((best < *fout) &&
+         ((flags & CLK_SET_ROUND_DOWN) == 0)) {
+               *stop = 1;
+               return (ERANGE);
+       }
+       if ((best > *fout) &&
+         ((flags & CLK_SET_ROUND_UP) == 0)) {
+               *stop = 1;
+               return (ERANGE);
+       }
+
+       DEVICE_LOCK(clk);
+       READ4(clk, sc->offset, &val);
+
+       n = aw_clk_factor_get_value(&sc->n, best_n);
+       m0 = aw_clk_factor_get_value(&sc->m0, best_m0);
+       m1 = aw_clk_factor_get_value(&sc->m1, best_m1);
+       val &= ~sc->n.mask;
+       val &= ~sc->m0.mask;
+       val &= ~sc->m1.mask;
+       val |= n << sc->n.shift;
+       val |= m0 << sc->m0.shift;
+       val |= m1 << sc->m1.shift;
+
+       WRITE4(clk, sc->offset, val);
+       DEVICE_UNLOCK(clk);
+
+       if ((sc->flags & AW_CLK_HAS_LOCK) != 0) {
+               for (retry = 0; retry < sc->lock_retries; retry++) {
+                       READ4(clk, sc->offset, &val);
+                       if ((val & (1 << sc->lock_shift)) != 0)
+                               break;
+                       DELAY(1000);
+               }
+       }
+
+       *fout = best;
+       *stop = 1;
+
+       return (0);
+}
+
+static int
+aw_clk_nmm_recalc(struct clknode *clk, uint64_t *freq)
+{
+       struct aw_clk_nmm_sc *sc;
+       uint32_t val, n, m0, m1;
+
+       sc = clknode_get_softc(clk);
+
+       DEVICE_LOCK(clk);
+       READ4(clk, sc->offset, &val);
+       DEVICE_UNLOCK(clk);
+
+       n = aw_clk_get_factor(val, &sc->n);
+       m0 = aw_clk_get_factor(val, &sc->m0);
+       m1 = aw_clk_get_factor(val, &sc->m1);
+
+       *freq = *freq * n / m0 / m1;
+
+       return (0);
+}
+
+static clknode_method_t aw_nmm_clknode_methods[] = {
+       /* Device interface */
+       CLKNODEMETHOD(clknode_init,             aw_clk_nmm_init),
+       CLKNODEMETHOD(clknode_set_gate,         aw_clk_nmm_set_gate),
+       CLKNODEMETHOD(clknode_recalc_freq,      aw_clk_nmm_recalc),
+       CLKNODEMETHOD(clknode_set_freq,         aw_clk_nmm_set_freq),
+       CLKNODEMETHOD_END
+};
+
+DEFINE_CLASS_1(aw_nmm_clknode, aw_nmm_clknode_class, aw_nmm_clknode_methods,
+    sizeof(struct aw_clk_nmm_sc), clknode_class);
+
+int
+aw_clk_nmm_register(struct clkdom *clkdom, struct aw_clk_nmm_def *clkdef)
+{
+       struct clknode *clk;
+       struct aw_clk_nmm_sc *sc;
+
+       clk = clknode_create(clkdom, &aw_nmm_clknode_class, &clkdef->clkdef);
+       if (clk == NULL)
+               return (1);
+
+       sc = clknode_get_softc(clk);
+
+       sc->offset = clkdef->offset;
+
+       sc->n.shift = clkdef->n.shift;
+       sc->n.width = clkdef->n.width;
+       sc->n.mask = ((1 << sc->n.width) - 1) << sc->n.shift;
+       sc->n.value = clkdef->n.value;
+       sc->n.flags = clkdef->n.flags;
+
+       sc->m0.shift = clkdef->m0.shift;
+       sc->m0.width = clkdef->m0.width;
+       sc->m0.mask = ((1 << sc->m0.width) - 1) << sc->m0.shift;
+       sc->m0.value = clkdef->m0.value;
+       sc->m0.flags = clkdef->m0.flags;
+
+       sc->m1.shift = clkdef->m1.shift;
+       sc->m1.width = clkdef->m1.width;
+       sc->m1.mask = ((1 << sc->m1.width) - 1) << sc->m1.shift;
+       sc->m1.value = clkdef->m1.value;
+       sc->m1.flags = clkdef->m1.flags;
+
+       sc->gate_shift = clkdef->gate_shift;
+
+       sc->lock_shift = clkdef->lock_shift;
+       sc->lock_retries = clkdef->lock_retries;
+
+       sc->flags = clkdef->flags;
+
+       clknode_register(clkdom, clk);
+
+       return (0);
+}

Copied: stable/12/sys/arm/allwinner/clkng/aw_clk_nmm.h (from r353527, 
head/sys/arm/allwinner/clkng/aw_clk_nmm.h)
==============================================================================
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ stable/12/sys/arm/allwinner/clkng/aw_clk_nmm.h      Thu Nov 28 18:02:13 
2019        (r355179, copy of r353527, 
head/sys/arm/allwinner/clkng/aw_clk_nmm.h)
@@ -0,0 +1,52 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
+ *
+ * Copyright (c) 2019 Emmanuel Vadot <[email protected]>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#ifndef        __AW_CLK_NMM_H__
+#define __AW_CLK_NMM_H__
+
+#include <dev/extres/clk/clk.h>
+
+struct aw_clk_nmm_def {
+       struct clknode_init_def clkdef;
+       uint32_t                offset;
+
+       struct aw_clk_factor    n;
+       struct aw_clk_factor    m0;
+       struct aw_clk_factor    m1;
+
+       uint32_t                gate_shift;
+       uint32_t                lock_shift;
+       uint32_t                lock_retries;
+
+       uint32_t                flags;
+};
+
+int    aw_clk_nmm_register(struct clkdom *clkdom, struct aw_clk_nmm_def 
*clkdef);
+
+#endif /* __AW_CLK_NMM_H__ */

Copied: stable/12/sys/arm/allwinner/clkng/aw_clk_np.c (from r353527, 
head/sys/arm/allwinner/clkng/aw_clk_np.c)
==============================================================================
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ stable/12/sys/arm/allwinner/clkng/aw_clk_np.c       Thu Nov 28 18:02:13 
2019        (r355179, copy of r353527, head/sys/arm/allwinner/clkng/aw_clk_np.c)
@@ -0,0 +1,267 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
+ *
+ * Copyright (c) 2019 Emmanuel Vadot <[email protected]>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/bus.h>
+
+#include <dev/extres/clk/clk.h>
+
+#include <arm/allwinner/clkng/aw_clk.h>
+#include <arm/allwinner/clkng/aw_clk_np.h>
+
+#include "clkdev_if.h"
+
+/*
+ * clknode for clocks matching the formula :
+ *
+ * clk = clkin * n / p
+ *
+ */
+
+struct aw_clk_np_sc {
+       uint32_t        offset;
+
+       struct aw_clk_factor    n;
+       struct aw_clk_factor    p;
+
+       uint32_t        gate_shift;
+       uint32_t        lock_shift;
+       uint32_t        lock_retries;
+
+       uint32_t        flags;
+};
+
+#define        WRITE4(_clk, off, val)                                          
\
+       CLKDEV_WRITE_4(clknode_get_device(_clk), off, val)
+#define        READ4(_clk, off, val)                                           
\
+       CLKDEV_READ_4(clknode_get_device(_clk), off, val)
+#define        DEVICE_LOCK(_clk)                                               
        \
+       CLKDEV_DEVICE_LOCK(clknode_get_device(_clk))
+#define        DEVICE_UNLOCK(_clk)                                             
\
+       CLKDEV_DEVICE_UNLOCK(clknode_get_device(_clk))
+
+static int
+aw_clk_np_init(struct clknode *clk, device_t dev)
+{
+       struct aw_clk_np_sc *sc;
+
+       sc = clknode_get_softc(clk);
+
+       clknode_init_parent_idx(clk, 0);
+       return (0);
+}
+
+static int
+aw_clk_np_set_gate(struct clknode *clk, bool enable)
+{
+       struct aw_clk_np_sc *sc;
+       uint32_t val;
+
+       sc = clknode_get_softc(clk);
+
+       if ((sc->flags & AW_CLK_HAS_GATE) == 0)
+               return (0);
+
+       DEVICE_LOCK(clk);
+       READ4(clk, sc->offset, &val);
+       if (enable)
+               val |= (1 << sc->gate_shift);
+       else
+               val &= ~(1 << sc->gate_shift);
+       WRITE4(clk, sc->offset, val);
+       DEVICE_UNLOCK(clk);
+
+       return (0);
+}
+
+static uint64_t
+aw_clk_np_find_best(struct aw_clk_np_sc *sc, uint64_t fparent, uint64_t *fout,
+    uint32_t *factor_n, uint32_t *factor_p)
+{
+       uint64_t cur, best;
+       uint32_t n, p, max_n, max_p, min_n, min_p;
+
+       *factor_n = *factor_p = 0;
+
+       max_n = aw_clk_factor_get_max(&sc->n);
+       max_p = aw_clk_factor_get_max(&sc->p);
+       min_n = aw_clk_factor_get_min(&sc->n);
+       min_p = aw_clk_factor_get_min(&sc->p);
+
+       for (p = min_p; p <= max_p; ) {
+               for (n = min_n; n <= max_n; ) {
+                       cur = fparent * n / p;
+                       if (abs(*fout - cur) < abs(*fout - best)) {
+                               best = cur;
+                               *factor_n = n;
+                               *factor_p = p;
+                       }
+
+                       n++;
+               }
+               p++;
+       }
+
+       return (best);
+}
+
+static int
+aw_clk_np_set_freq(struct clknode *clk, uint64_t fparent, uint64_t *fout,
+    int flags, int *stop)
+{
+       struct aw_clk_np_sc *sc;
+       uint64_t cur, best;
+       uint32_t val, n, p, best_n, best_p;
+       int retry;
+
+       sc = clknode_get_softc(clk);
+
+       best = cur = 0;
+
+       best = aw_clk_np_find_best(sc, fparent, fout,
+           &best_n, &best_p);
+
+       if ((flags & CLK_SET_DRYRUN) != 0) {
+               *fout = best;
+               *stop = 1;
+               return (0);
+       }
+
+       if ((best < *fout) &&
+         ((flags & CLK_SET_ROUND_DOWN) == 0)) {
+               *stop = 1;
+               return (ERANGE);
+       }
+       if ((best > *fout) &&
+         ((flags & CLK_SET_ROUND_UP) == 0)) {
+               *stop = 1;
+               return (ERANGE);
+       }
+
+       DEVICE_LOCK(clk);
+       READ4(clk, sc->offset, &val);
+
+       n = aw_clk_factor_get_value(&sc->n, best_n);
+       p = aw_clk_factor_get_value(&sc->p, best_p);
+       val &= ~sc->n.mask;
+       val &= ~sc->p.mask;
+       val |= n << sc->n.shift;
+       val |= p << sc->p.shift;
+
+       WRITE4(clk, sc->offset, val);
+       DEVICE_UNLOCK(clk);
+
+       if ((sc->flags & AW_CLK_HAS_LOCK) != 0) {
+               for (retry = 0; retry < sc->lock_retries; retry++) {
+                       READ4(clk, sc->offset, &val);
+                       if ((val & (1 << sc->lock_shift)) != 0)
+                               break;
+                       DELAY(1000);
+               }
+       }
+
+       *fout = best;
+       *stop = 1;
+
+       return (0);
+}
+
+static int
+aw_clk_np_recalc(struct clknode *clk, uint64_t *freq)
+{
+       struct aw_clk_np_sc *sc;
+       uint32_t val, n, p;
+
+       sc = clknode_get_softc(clk);
+
+       DEVICE_LOCK(clk);
+       READ4(clk, sc->offset, &val);
+       DEVICE_UNLOCK(clk);
+
+       n = aw_clk_get_factor(val, &sc->n);
+       p = aw_clk_get_factor(val, &sc->p);
+
+       *freq = *freq * n / p;
+
+       return (0);
+}
+
+static clknode_method_t aw_np_clknode_methods[] = {
+       /* Device interface */
+       CLKNODEMETHOD(clknode_init,             aw_clk_np_init),
+       CLKNODEMETHOD(clknode_set_gate,         aw_clk_np_set_gate),
+       CLKNODEMETHOD(clknode_recalc_freq,      aw_clk_np_recalc),
+       CLKNODEMETHOD(clknode_set_freq,         aw_clk_np_set_freq),
+       CLKNODEMETHOD_END
+};
+
+DEFINE_CLASS_1(aw_np_clknode, aw_np_clknode_class, aw_np_clknode_methods,
+    sizeof(struct aw_clk_np_sc), clknode_class);
+
+int
+aw_clk_np_register(struct clkdom *clkdom, struct aw_clk_np_def *clkdef)
+{
+       struct clknode *clk;
+       struct aw_clk_np_sc *sc;
+
+       clk = clknode_create(clkdom, &aw_np_clknode_class, &clkdef->clkdef);
+       if (clk == NULL)
+               return (1);
+
+       sc = clknode_get_softc(clk);
+
+       sc->offset = clkdef->offset;
+
+       sc->n.shift = clkdef->n.shift;
+       sc->n.width = clkdef->n.width;
+       sc->n.mask = ((1 << sc->n.width) - 1) << sc->n.shift;
+       sc->n.value = clkdef->n.value;
+       sc->n.flags = clkdef->n.flags;
+
+       sc->p.shift = clkdef->p.shift;
+       sc->p.width = clkdef->p.width;
+       sc->p.mask = ((1 << sc->p.width) - 1) << sc->p.shift;
+       sc->p.value = clkdef->p.value;
+       sc->p.flags = clkdef->p.flags;
+
+       sc->gate_shift = clkdef->gate_shift;
+
+       sc->lock_shift = clkdef->lock_shift;
+       sc->lock_retries = clkdef->lock_retries;
+
+       sc->flags = clkdef->flags;
+
+       clknode_register(clkdom, clk);
+
+       return (0);
+}

Copied: stable/12/sys/arm/allwinner/clkng/aw_clk_np.h (from r353527, 
head/sys/arm/allwinner/clkng/aw_clk_np.h)
==============================================================================
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ stable/12/sys/arm/allwinner/clkng/aw_clk_np.h       Thu Nov 28 18:02:13 
2019        (r355179, copy of r353527, head/sys/arm/allwinner/clkng/aw_clk_np.h)
@@ -0,0 +1,51 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
+ *
+ * Copyright (c) 2019 Emmanuel Vadot <[email protected]>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#ifndef        __AW_CLK_NP_H__
+#define __AW_CLK_NP_H__
+
+#include <dev/extres/clk/clk.h>
+
+struct aw_clk_np_def {
+       struct clknode_init_def clkdef;
+       uint32_t                offset;
+
+       struct aw_clk_factor    n;
+       struct aw_clk_factor    p;
+
+       uint32_t                gate_shift;
+       uint32_t                lock_shift;
+       uint32_t                lock_retries;
+
+       uint32_t                flags;
+};
+
+int    aw_clk_np_register(struct clkdom *clkdom, struct aw_clk_np_def *clkdef);
+
+#endif /* __AW_CLK_NP_H__ */

Modified: stable/12/sys/arm/allwinner/files.allwinner
==============================================================================
--- stable/12/sys/arm/allwinner/files.allwinner Thu Nov 28 17:52:25 2019        
(r355178)
+++ stable/12/sys/arm/allwinner/files.allwinner Thu Nov 28 18:02:13 2019        
(r355179)
@@ -41,4 +41,6 @@ arm/allwinner/clkng/aw_clk_m.c                standard
 arm/allwinner/clkng/aw_clk_mipi.c      standard
 arm/allwinner/clkng/aw_clk_nkmp.c      standard
 arm/allwinner/clkng/aw_clk_nm.c                standard
+arm/allwinner/clkng/aw_clk_np.c                standard
+arm/allwinner/clkng/aw_clk_nmm.c       standard
 arm/allwinner/clkng/aw_clk_prediv_mux.c        standard

Modified: stable/12/sys/conf/files.arm64
==============================================================================
--- stable/12/sys/conf/files.arm64      Thu Nov 28 17:52:25 2019        
(r355178)
+++ stable/12/sys/conf/files.arm64      Thu Nov 28 18:02:13 2019        
(r355179)
@@ -53,6 +53,8 @@ arm/allwinner/clkng/aw_clk_m.c                optional        
aw_ccu fdt
 arm/allwinner/clkng/aw_clk_mipi.c      optional        aw_ccu fdt
 arm/allwinner/clkng/aw_clk_nkmp.c      optional        aw_ccu fdt
 arm/allwinner/clkng/aw_clk_nm.c                optional        aw_ccu fdt
+arm/allwinner/clkng/aw_clk_nmm.c       optional        aw_ccu fdt
+arm/allwinner/clkng/aw_clk_np.c                optional        aw_ccu fdt
 arm/allwinner/clkng/aw_clk_prediv_mux.c        optional        aw_ccu fdt
 arm/allwinner/clkng/ccu_a64.c          optional        soc_allwinner_a64 
aw_ccu fdt
 arm/allwinner/clkng/ccu_h3.c           optional        soc_allwinner_h5 aw_ccu 
fdt
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