Author: neel
Date: Sat Jan 23 03:19:13 2010
New Revision: 202864
URL: http://svn.freebsd.org/changeset/base/202864
Log:
Remove Sibyte specific code from locore.S that sets the k0seg coherency.
Move it to platform_start() instead.
Approved by: imp (mentor)
Modified:
head/sys/mips/include/cpu.h
head/sys/mips/mips/locore.S
head/sys/mips/sibyte/sb_machdep.c
Modified: head/sys/mips/include/cpu.h
==============================================================================
--- head/sys/mips/include/cpu.h Sat Jan 23 01:44:30 2010 (r202863)
+++ head/sys/mips/include/cpu.h Sat Jan 23 03:19:13 2010 (r202864)
@@ -163,11 +163,8 @@
* The bits in the CONFIG register
*/
#define CFG_K0_UNCACHED 2
-#if defined(CPU_SB1)
-#define CFG_K0_COHERENT 5 /* cacheable coherent */
-#else
#define CFG_K0_CACHED 3
-#endif
+#define CFG_K0_MASK 0x7
/*
* The bits in the context register.
Modified: head/sys/mips/mips/locore.S
==============================================================================
--- head/sys/mips/mips/locore.S Sat Jan 23 01:44:30 2010 (r202863)
+++ head/sys/mips/mips/locore.S Sat Jan 23 03:19:13 2010 (r202864)
@@ -128,11 +128,7 @@ VECTOR(_locore, unknown)
mtc0 t2, COP_0_STATUS_REG
COP0_SYNC
/* Make sure KSEG0 is cached */
-#ifdef CPU_SB1
- li t0, CFG_K0_COHERENT
-#else
li t0, CFG_K0_CACHED
-#endif
mtc0 t0, MIPS_COP_0_CONFIG
COP0_SYNC
Modified: head/sys/mips/sibyte/sb_machdep.c
==============================================================================
--- head/sys/mips/sibyte/sb_machdep.c Sat Jan 23 01:44:30 2010
(r202863)
+++ head/sys/mips/sibyte/sb_machdep.c Sat Jan 23 03:19:13 2010
(r202864)
@@ -230,12 +230,29 @@ platform_trap_exit(void)
}
+static void
+kseg0_map_coherent(void)
+{
+ uint32_t config;
+ const int CFG_K0_COHERENT = 5;
+
+ config = mips_rd_config();
+ config &= ~CFG_K0_MASK;
+ config |= CFG_K0_COHERENT;
+ mips_wr_config(config);
+}
+
void
platform_start(__register_t a0, __register_t a1, __register_t a2,
__register_t a3)
{
vm_offset_t kernend;
+ /*
+ * Make sure that kseg0 is mapped cacheable-coherent
+ */
+ kseg0_map_coherent();
+
/* clear the BSS and SBSS segments */
memset(&edata, 0, (vm_offset_t)&end - (vm_offset_t)&edata);
kernend = round_page((vm_offset_t)&end);
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