Author: jhibbits
Date: Tue May 19 01:06:31 2020
New Revision: 361232
URL: https://svnweb.freebsd.org/changeset/base/361232
Log:
powerpc/mmu: Don't use the cache instructions to zero pages
A page (even physmem) can be marked as cache-inhibited. Attempting to use
'dcbz' to zero a page mapped cache-inhibited triggers an alignment
exception, which is fatal in kernel. This was seen when testing hardware
acceleration with X on POWER9.
At some point in the future, this should be changed to a more straight
forward zero loop instead of bzero(), and a similar change be made to the
other pmaps.
Reported by: pkubaj@
Modified:
head/sys/powerpc/aim/mmu_radix.c
Modified: head/sys/powerpc/aim/mmu_radix.c
==============================================================================
--- head/sys/powerpc/aim/mmu_radix.c Tue May 19 01:05:13 2020
(r361231)
+++ head/sys/powerpc/aim/mmu_radix.c Tue May 19 01:06:31 2020
(r361232)
@@ -909,10 +909,8 @@ static void
pagezero(vm_offset_t va)
{
va = trunc_page(va);
- int off;
- for (off = 0; off < PAGE_SIZE; off += cacheline_size)
- __asm __volatile("dcbz 0,%0" :: "r"(va + off));
+ bzero((void *)va, PAGE_SIZE);
}
static uint64_t
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