Author: kib
Date: Fri Jun 19 11:32:42 2020
New Revision: 362374
URL: https://svnweb.freebsd.org/changeset/base/362374
Log:
MFC r362129:
x86: add bits definitions for SRBDS mitigation control.
Modified:
stable/12/sys/x86/include/specialreg.h
stable/12/sys/x86/x86/identcpu.c
Directory Properties:
stable/12/ (props changed)
Modified: stable/12/sys/x86/include/specialreg.h
==============================================================================
--- stable/12/sys/x86/include/specialreg.h Fri Jun 19 11:24:30 2020
(r362373)
+++ stable/12/sys/x86/include/specialreg.h Fri Jun 19 11:32:42 2020
(r362374)
@@ -448,6 +448,7 @@
#define CPUID_STDEXT3_AVX5124VNNIW 0x00000004
#define CPUID_STDEXT3_AVX5124FMAPS 0x00000008
#define CPUID_STDEXT3_AVX512VP2INTERSECT 0x00000100
+#define CPUID_STDEXT3_MCUOPT 0x00000200
#define CPUID_STDEXT3_MD_CLEAR 0x00000400
#define CPUID_STDEXT3_TSXFA 0x00002000
#define CPUID_STDEXT3_PCONFIG 0x00040000
@@ -526,6 +527,7 @@
#define MSR_BBL_CR_BUSY 0x11b
#define MSR_BBL_CR_CTL3 0x11e
#define MSR_IA32_TSX_CTRL 0x122
+#define MSR_IA32_MCU_OPT_CTRL 0x123
#define MSR_SYSENTER_CS_MSR 0x174
#define MSR_SYSENTER_ESP_MSR 0x175
#define MSR_SYSENTER_EIP_MSR 0x176
@@ -762,6 +764,9 @@
/* MSR IA32_FLUSH_CMD */
#define IA32_FLUSH_CMD_L1D 0x00000001
+
+/* MSR IA32_MCU_OPT_CTRL */
+#define IA32_RNGDS_MITG_DIS 0x00000001
/* MSR IA32_HWP_CAPABILITIES */
#define IA32_HWP_CAPABILITIES_HIGHEST_PERFORMANCE(x) (((x) >> 0) &
0xff)
Modified: stable/12/sys/x86/x86/identcpu.c
==============================================================================
--- stable/12/sys/x86/x86/identcpu.c Fri Jun 19 11:24:30 2020
(r362373)
+++ stable/12/sys/x86/x86/identcpu.c Fri Jun 19 11:32:42 2020
(r362374)
@@ -1016,6 +1016,7 @@ printcpuinfo(void)
"\003AVX512_4VNNIW"
"\004AVX512_4FMAPS"
"\011AVX512VP2INTERSECT"
+ "\012MCUOPT"
"\013MD_CLEAR"
"\016TSXFA"
"\023PCONFIG"
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