Author: bz
Date: Sat Sep 12 19:33:25 2020
New Revision: 365670
URL: https://svnweb.freebsd.org/changeset/base/365670
Log:
MFS r365608:
Merge WiFi net80211, drivers, and management in order to support better 11n
and upcoming 11ac.
This includes an ath(4) update, some run(4) 11n support, 11n for otus(4),
A-MPDU, A-MSDU, A-MPDU+A-MSDU and Fast frames options, scanning fixes,
enhanced PRIV checks for jails, restored parent device name printing,
improvements for upcoming VHT support, lots of under-the-hood infrastructure
improvements, new device ID, debug tools updates, some whitespace changes
(to make future MFCs easier).
This does not include (most) epoch(9) related changes as too much other
infrastructure was not merged for that.
Tested on: some ath(4) AP, run(4) STA, and rtwn(4) STA
Discussed with: adrian (extremely briefly)
Sponsored by: Rubicon Communications, LLC (d/b/a "Netgate")
[partially]
Approved by: re (gjb)
Relnotes: yes
Added:
releng/12.2/tools/tools/ath/athani/
- copied from r365608, stable/12/tools/tools/ath/athani/
Modified:
releng/12.2/lib/lib80211/lib80211_regdomain.c
releng/12.2/lib/lib80211/lib80211_regdomain.h
releng/12.2/lib/lib80211/regdomain.xml
releng/12.2/sbin/ifconfig/ifieee80211.c
releng/12.2/share/man/man4/ath.4
releng/12.2/share/man/man4/net80211.4
releng/12.2/share/man/man4/run.4
releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300.h
releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_ani.c
releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_eeprom.c
releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_freebsd.c
releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_misc.c
releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_phy.c
releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_reset.c
releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_stub_funcs.c
releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_stub_funcs.h
releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300eep.h
releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300template_ap121.h
releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300template_aphrodite.h
releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300template_cus157.h
releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300template_generic.h
releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300template_hb112.h
releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300template_hb116.h
releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300template_osprey_k31.h
releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300template_wasp_2.h
releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300template_xb112.h
releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300template_xb113.h
releng/12.2/sys/dev/an/if_an.c
releng/12.2/sys/dev/ath/ah_osdep.c
releng/12.2/sys/dev/ath/ah_osdep_ar5210.c
releng/12.2/sys/dev/ath/ah_osdep_ar5211.c
releng/12.2/sys/dev/ath/ah_osdep_ar5212.c
releng/12.2/sys/dev/ath/ah_osdep_ar5416.c
releng/12.2/sys/dev/ath/ah_osdep_ar9300.c
releng/12.2/sys/dev/ath/ath_dfs/null/dfs_null.c
releng/12.2/sys/dev/ath/ath_hal/ah.c
releng/12.2/sys/dev/ath/ath_hal/ah.h
releng/12.2/sys/dev/ath/ath_hal/ah_eeprom_9287.c
releng/12.2/sys/dev/ath/ath_hal/ah_eeprom_9287.h
releng/12.2/sys/dev/ath/ath_hal/ah_eeprom_v14.c
releng/12.2/sys/dev/ath/ath_hal/ah_eeprom_v3.c
releng/12.2/sys/dev/ath/ath_hal/ah_eeprom_v3.h
releng/12.2/sys/dev/ath/ath_hal/ah_eeprom_v4k.c
releng/12.2/sys/dev/ath/ath_hal/ah_internal.h
releng/12.2/sys/dev/ath/ath_hal/ah_regdomain.c
releng/12.2/sys/dev/ath/ath_hal/ah_regdomain/ah_rd_domains.h
releng/12.2/sys/dev/ath/ath_hal/ah_regdomain/ah_rd_freqbands.h
releng/12.2/sys/dev/ath/ath_hal/ah_soc.h
releng/12.2/sys/dev/ath/ath_hal/ar5210/ar5210.h
releng/12.2/sys/dev/ath/ath_hal/ar5210/ar5210_recv.c
releng/12.2/sys/dev/ath/ath_hal/ar5210/ar5210_reset.c
releng/12.2/sys/dev/ath/ath_hal/ar5211/ar5211.h
releng/12.2/sys/dev/ath/ath_hal/ar5211/ar5211_keycache.c
releng/12.2/sys/dev/ath/ath_hal/ar5211/ar5211_misc.c
releng/12.2/sys/dev/ath/ath_hal/ar5211/ar5211_phy.c
releng/12.2/sys/dev/ath/ath_hal/ar5211/ar5211_recv.c
releng/12.2/sys/dev/ath/ath_hal/ar5211/ar5211_xmit.c
releng/12.2/sys/dev/ath/ath_hal/ar5211/ar5211phy.h
releng/12.2/sys/dev/ath/ath_hal/ar5211/ar5211reg.h
releng/12.2/sys/dev/ath/ath_hal/ar5212/ar2316.c
releng/12.2/sys/dev/ath/ath_hal/ar5212/ar2317.c
releng/12.2/sys/dev/ath/ath_hal/ar5212/ar2413.c
releng/12.2/sys/dev/ath/ath_hal/ar5212/ar2425.c
releng/12.2/sys/dev/ath/ath_hal/ar5212/ar5111.c
releng/12.2/sys/dev/ath/ath_hal/ar5212/ar5112.c
releng/12.2/sys/dev/ath/ath_hal/ar5212/ar5212.h
releng/12.2/sys/dev/ath/ath_hal/ar5212/ar5212_ani.c
releng/12.2/sys/dev/ath/ath_hal/ar5212/ar5212_interrupts.c
releng/12.2/sys/dev/ath/ath_hal/ar5212/ar5212_keycache.c
releng/12.2/sys/dev/ath/ath_hal/ar5212/ar5212_misc.c
releng/12.2/sys/dev/ath/ath_hal/ar5212/ar5212_phy.c
releng/12.2/sys/dev/ath/ath_hal/ar5212/ar5212_recv.c
releng/12.2/sys/dev/ath/ath_hal/ar5212/ar5212_reset.c
releng/12.2/sys/dev/ath/ath_hal/ar5212/ar5212_xmit.c
releng/12.2/sys/dev/ath/ath_hal/ar5212/ar5212phy.h
releng/12.2/sys/dev/ath/ath_hal/ar5212/ar5413.c
releng/12.2/sys/dev/ath/ath_hal/ar5312/ar5312_eeprom.c
releng/12.2/sys/dev/ath/ath_hal/ar5312/ar5312_gpio.c
releng/12.2/sys/dev/ath/ath_hal/ar5312/ar5312_interrupts.c
releng/12.2/sys/dev/ath/ath_hal/ar5312/ar5312_reset.c
releng/12.2/sys/dev/ath/ath_hal/ar5312/ar5312reg.h
releng/12.2/sys/dev/ath/ath_hal/ar5312/ar5315_gpio.c
releng/12.2/sys/dev/ath/ath_hal/ar5416/ar2133.c
releng/12.2/sys/dev/ath/ath_hal/ar5416/ar5416.h
releng/12.2/sys/dev/ath/ath_hal/ar5416/ar5416_ani.c
releng/12.2/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c
releng/12.2/sys/dev/ath/ath_hal/ar5416/ar5416_beacon.c
releng/12.2/sys/dev/ath/ath_hal/ar5416/ar5416_cal.c
releng/12.2/sys/dev/ath/ath_hal/ar5416/ar5416_cal.h
releng/12.2/sys/dev/ath/ath_hal/ar5416/ar5416_gpio.c
releng/12.2/sys/dev/ath/ath_hal/ar5416/ar5416_power.c
releng/12.2/sys/dev/ath/ath_hal/ar5416/ar5416_recv.c
releng/12.2/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c
releng/12.2/sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
releng/12.2/sys/dev/ath/ath_hal/ar5416/ar5416_xmit.c
releng/12.2/sys/dev/ath/ath_hal/ar5416/ar5416desc.h
releng/12.2/sys/dev/ath/ath_hal/ar5416/ar5416reg.h
releng/12.2/sys/dev/ath/ath_hal/ar9001/ar9130_attach.c
releng/12.2/sys/dev/ath/ath_hal/ar9001/ar9160_attach.c
releng/12.2/sys/dev/ath/ath_hal/ar9002/ar9280_attach.c
releng/12.2/sys/dev/ath/ath_hal/ar9002/ar9280_olc.c
releng/12.2/sys/dev/ath/ath_hal/ar9002/ar9285.c
releng/12.2/sys/dev/ath/ath_hal/ar9002/ar9285_attach.c
releng/12.2/sys/dev/ath/ath_hal/ar9002/ar9285_btcoex.c
releng/12.2/sys/dev/ath/ath_hal/ar9002/ar9285_diversity.c
releng/12.2/sys/dev/ath/ath_hal/ar9002/ar9285_reset.c
releng/12.2/sys/dev/ath/ath_hal/ar9002/ar9287_attach.c
releng/12.2/sys/dev/ath/ath_hal/ar9002/ar9287_cal.c
releng/12.2/sys/dev/ath/ath_hal/ar9002/ar9287_reset.c
releng/12.2/sys/dev/ath/ath_rate/amrr/amrr.c
releng/12.2/sys/dev/ath/ath_rate/onoe/onoe.c
releng/12.2/sys/dev/ath/ath_rate/sample/sample.c
releng/12.2/sys/dev/ath/ath_rate/sample/sample.h
releng/12.2/sys/dev/ath/ath_rate/sample/tx_schedules.h
releng/12.2/sys/dev/ath/if_ath.c
releng/12.2/sys/dev/ath/if_ath_ahb.c
releng/12.2/sys/dev/ath/if_ath_beacon.c
releng/12.2/sys/dev/ath/if_ath_beacon.h
releng/12.2/sys/dev/ath/if_ath_btcoex.c
releng/12.2/sys/dev/ath/if_ath_dfs.c
releng/12.2/sys/dev/ath/if_ath_drv.c
releng/12.2/sys/dev/ath/if_ath_ioctl.c
releng/12.2/sys/dev/ath/if_ath_led.c
releng/12.2/sys/dev/ath/if_ath_lna_div.c
releng/12.2/sys/dev/ath/if_ath_misc.h
releng/12.2/sys/dev/ath/if_ath_pci.c
releng/12.2/sys/dev/ath/if_ath_pci_devlist.h
releng/12.2/sys/dev/ath/if_ath_rate.c
releng/12.2/sys/dev/ath/if_ath_rx.c
releng/12.2/sys/dev/ath/if_ath_rx_edma.c
releng/12.2/sys/dev/ath/if_ath_spectral.c
releng/12.2/sys/dev/ath/if_ath_sysctl.c
releng/12.2/sys/dev/ath/if_ath_tx.c
releng/12.2/sys/dev/ath/if_ath_tx.h
releng/12.2/sys/dev/ath/if_ath_tx_edma.c
releng/12.2/sys/dev/ath/if_ath_tx_ht.c
releng/12.2/sys/dev/ath/if_athioctl.h
releng/12.2/sys/dev/ath/if_athrate.h
releng/12.2/sys/dev/ath/if_athvar.h
releng/12.2/sys/dev/bwi/bwimac.c
releng/12.2/sys/dev/bwi/bwiphy.c
releng/12.2/sys/dev/bwi/bwirf.c
releng/12.2/sys/dev/bwi/if_bwi.c
releng/12.2/sys/dev/bwi/if_bwi_pci.c
releng/12.2/sys/dev/bwi/if_bwireg.h
releng/12.2/sys/dev/bwn/if_bwn.c
releng/12.2/sys/dev/bwn/if_bwn_pci.c
releng/12.2/sys/dev/bwn/if_bwn_pcivar.h
releng/12.2/sys/dev/bwn/if_bwn_phy_g.c
releng/12.2/sys/dev/bwn/if_bwnvar.h
releng/12.2/sys/dev/iwm/if_iwm.c
releng/12.2/sys/dev/iwn/if_iwn.c
releng/12.2/sys/dev/mwl/if_mwl.c
releng/12.2/sys/dev/mwl/if_mwl_pci.c
releng/12.2/sys/dev/mwl/mwlreg.h
releng/12.2/sys/dev/otus/if_otus.c
releng/12.2/sys/dev/otus/if_otusreg.h
releng/12.2/sys/dev/rtwn/if_rtwn.c
releng/12.2/sys/dev/rtwn/if_rtwn_beacon.c
releng/12.2/sys/dev/rtwn/if_rtwn_calib.c
releng/12.2/sys/dev/rtwn/if_rtwn_cam.c
releng/12.2/sys/dev/rtwn/if_rtwn_efuse.c
releng/12.2/sys/dev/rtwn/if_rtwn_fw.c
releng/12.2/sys/dev/rtwn/if_rtwn_fw.h
releng/12.2/sys/dev/rtwn/if_rtwn_ridx.h
releng/12.2/sys/dev/rtwn/if_rtwn_rx.c
releng/12.2/sys/dev/rtwn/if_rtwn_rx.h
releng/12.2/sys/dev/rtwn/if_rtwn_task.c
releng/12.2/sys/dev/rtwn/if_rtwn_tx.c
releng/12.2/sys/dev/rtwn/if_rtwnreg.h
releng/12.2/sys/dev/rtwn/if_rtwnvar.h
releng/12.2/sys/dev/rtwn/pci/rtwn_pci_attach.c
releng/12.2/sys/dev/rtwn/pci/rtwn_pci_reg.c
releng/12.2/sys/dev/rtwn/pci/rtwn_pci_rx.c
releng/12.2/sys/dev/rtwn/pci/rtwn_pci_tx.c
releng/12.2/sys/dev/rtwn/pci/rtwn_pci_var.h
releng/12.2/sys/dev/rtwn/rtl8188e/pci/r88ee.h
releng/12.2/sys/dev/rtwn/rtl8188e/pci/r88ee_reg.h
releng/12.2/sys/dev/rtwn/rtl8188e/r88e.h
releng/12.2/sys/dev/rtwn/rtl8188e/r88e_beacon.c
releng/12.2/sys/dev/rtwn/rtl8188e/r88e_calib.c
releng/12.2/sys/dev/rtwn/rtl8188e/r88e_chan.c
releng/12.2/sys/dev/rtwn/rtl8188e/r88e_fw.c
releng/12.2/sys/dev/rtwn/rtl8188e/r88e_init.c
releng/12.2/sys/dev/rtwn/rtl8188e/r88e_led.c
releng/12.2/sys/dev/rtwn/rtl8188e/r88e_priv.h
releng/12.2/sys/dev/rtwn/rtl8188e/r88e_reg.h
releng/12.2/sys/dev/rtwn/rtl8188e/r88e_rf.c
releng/12.2/sys/dev/rtwn/rtl8188e/r88e_rom.c
releng/12.2/sys/dev/rtwn/rtl8188e/r88e_rx.c
releng/12.2/sys/dev/rtwn/rtl8188e/r88e_tx.c
releng/12.2/sys/dev/rtwn/rtl8188e/usb/r88eu.h
releng/12.2/sys/dev/rtwn/rtl8188e/usb/r88eu_attach.c
releng/12.2/sys/dev/rtwn/rtl8188e/usb/r88eu_init.c
releng/12.2/sys/dev/rtwn/rtl8192c/pci/r92ce.h
releng/12.2/sys/dev/rtwn/rtl8192c/pci/r92ce_attach.c
releng/12.2/sys/dev/rtwn/rtl8192c/pci/r92ce_calib.c
releng/12.2/sys/dev/rtwn/rtl8192c/pci/r92ce_fw.c
releng/12.2/sys/dev/rtwn/rtl8192c/pci/r92ce_init.c
releng/12.2/sys/dev/rtwn/rtl8192c/pci/r92ce_priv.h
releng/12.2/sys/dev/rtwn/rtl8192c/pci/r92ce_reg.h
releng/12.2/sys/dev/rtwn/rtl8192c/pci/r92ce_rx.c
releng/12.2/sys/dev/rtwn/rtl8192c/pci/r92ce_tx.c
releng/12.2/sys/dev/rtwn/rtl8192c/r92c.h
releng/12.2/sys/dev/rtwn/rtl8192c/r92c_attach.c
releng/12.2/sys/dev/rtwn/rtl8192c/r92c_beacon.c
releng/12.2/sys/dev/rtwn/rtl8192c/r92c_calib.c
releng/12.2/sys/dev/rtwn/rtl8192c/r92c_chan.c
releng/12.2/sys/dev/rtwn/rtl8192c/r92c_fw.c
releng/12.2/sys/dev/rtwn/rtl8192c/r92c_init.c
releng/12.2/sys/dev/rtwn/rtl8192c/r92c_priv.h
releng/12.2/sys/dev/rtwn/rtl8192c/r92c_reg.h
releng/12.2/sys/dev/rtwn/rtl8192c/r92c_rf.c
releng/12.2/sys/dev/rtwn/rtl8192c/r92c_rom.c
releng/12.2/sys/dev/rtwn/rtl8192c/r92c_rx.c
releng/12.2/sys/dev/rtwn/rtl8192c/r92c_tx.c
releng/12.2/sys/dev/rtwn/rtl8192c/r92c_tx_desc.h
releng/12.2/sys/dev/rtwn/rtl8192c/usb/r92cu.h
releng/12.2/sys/dev/rtwn/rtl8192c/usb/r92cu_attach.c
releng/12.2/sys/dev/rtwn/rtl8192c/usb/r92cu_init.c
releng/12.2/sys/dev/rtwn/rtl8192c/usb/r92cu_led.c
releng/12.2/sys/dev/rtwn/rtl8192c/usb/r92cu_priv.h
releng/12.2/sys/dev/rtwn/rtl8192c/usb/r92cu_reg.h
releng/12.2/sys/dev/rtwn/rtl8192c/usb/r92cu_rx.c
releng/12.2/sys/dev/rtwn/rtl8192c/usb/r92cu_tx.c
releng/12.2/sys/dev/rtwn/rtl8192c/usb/r92cu_tx_desc.h
releng/12.2/sys/dev/rtwn/rtl8192e/r92e.h
releng/12.2/sys/dev/rtwn/rtl8192e/r92e_chan.c
releng/12.2/sys/dev/rtwn/rtl8192e/r92e_priv.h
releng/12.2/sys/dev/rtwn/rtl8192e/usb/r92eu.h
releng/12.2/sys/dev/rtwn/rtl8812a/r12a.h
releng/12.2/sys/dev/rtwn/rtl8812a/r12a_beacon.c
releng/12.2/sys/dev/rtwn/rtl8812a/r12a_calib.c
releng/12.2/sys/dev/rtwn/rtl8812a/r12a_caps.c
releng/12.2/sys/dev/rtwn/rtl8812a/r12a_chan.c
releng/12.2/sys/dev/rtwn/rtl8812a/r12a_fw.c
releng/12.2/sys/dev/rtwn/rtl8812a/r12a_fw_cmd.h
releng/12.2/sys/dev/rtwn/rtl8812a/r12a_init.c
releng/12.2/sys/dev/rtwn/rtl8812a/r12a_led.c
releng/12.2/sys/dev/rtwn/rtl8812a/r12a_priv.h
releng/12.2/sys/dev/rtwn/rtl8812a/r12a_reg.h
releng/12.2/sys/dev/rtwn/rtl8812a/r12a_rf.c
releng/12.2/sys/dev/rtwn/rtl8812a/r12a_rom.c
releng/12.2/sys/dev/rtwn/rtl8812a/r12a_rx.c
releng/12.2/sys/dev/rtwn/rtl8812a/r12a_tx.c
releng/12.2/sys/dev/rtwn/rtl8812a/r12a_tx_desc.h
releng/12.2/sys/dev/rtwn/rtl8812a/usb/r12au.h
releng/12.2/sys/dev/rtwn/rtl8812a/usb/r12au_attach.c
releng/12.2/sys/dev/rtwn/rtl8812a/usb/r12au_init.c
releng/12.2/sys/dev/rtwn/rtl8812a/usb/r12au_rx.c
releng/12.2/sys/dev/rtwn/rtl8812a/usb/r12au_tx.c
releng/12.2/sys/dev/rtwn/rtl8821a/r21a.h
releng/12.2/sys/dev/rtwn/rtl8821a/r21a_beacon.c
releng/12.2/sys/dev/rtwn/rtl8821a/r21a_calib.c
releng/12.2/sys/dev/rtwn/rtl8821a/r21a_chan.c
releng/12.2/sys/dev/rtwn/rtl8821a/r21a_fw.c
releng/12.2/sys/dev/rtwn/rtl8821a/r21a_init.c
releng/12.2/sys/dev/rtwn/rtl8821a/r21a_led.c
releng/12.2/sys/dev/rtwn/rtl8821a/r21a_priv.h
releng/12.2/sys/dev/rtwn/rtl8821a/r21a_reg.h
releng/12.2/sys/dev/rtwn/rtl8821a/r21a_rom.c
releng/12.2/sys/dev/rtwn/rtl8821a/r21a_rx.c
releng/12.2/sys/dev/rtwn/rtl8821a/usb/r21au.h
releng/12.2/sys/dev/rtwn/rtl8821a/usb/r21au_attach.c
releng/12.2/sys/dev/rtwn/rtl8821a/usb/r21au_dfs.c
releng/12.2/sys/dev/rtwn/rtl8821a/usb/r21au_init.c
releng/12.2/sys/dev/rtwn/usb/rtwn_usb_attach.c
releng/12.2/sys/dev/rtwn/usb/rtwn_usb_attach.h
releng/12.2/sys/dev/rtwn/usb/rtwn_usb_ep.c
releng/12.2/sys/dev/rtwn/usb/rtwn_usb_reg.c
releng/12.2/sys/dev/rtwn/usb/rtwn_usb_tx.c
releng/12.2/sys/dev/usb/usbdevs
releng/12.2/sys/dev/usb/wlan/if_rsu.c
releng/12.2/sys/dev/usb/wlan/if_run.c
releng/12.2/sys/dev/usb/wlan/if_runreg.h
releng/12.2/sys/dev/usb/wlan/if_runvar.h
releng/12.2/sys/dev/usb/wlan/if_zyd.c
releng/12.2/sys/dev/wi/if_wavelan_ieee.h
releng/12.2/sys/dev/wi/if_wi.c
releng/12.2/sys/dev/wi/if_wi_macio.c
releng/12.2/sys/dev/wi/if_wi_pccard.c
releng/12.2/sys/dev/wi/if_wi_pci.c
releng/12.2/sys/dev/wpi/if_wpireg.h
releng/12.2/sys/dev/wtap/if_wtap.c
releng/12.2/sys/kern/kern_jail.c
releng/12.2/sys/net80211/_ieee80211.h
releng/12.2/sys/net80211/ieee80211.c
releng/12.2/sys/net80211/ieee80211.h
releng/12.2/sys/net80211/ieee80211_adhoc.c
releng/12.2/sys/net80211/ieee80211_amrr.c
releng/12.2/sys/net80211/ieee80211_ddb.c
releng/12.2/sys/net80211/ieee80211_freebsd.c
releng/12.2/sys/net80211/ieee80211_freebsd.h
releng/12.2/sys/net80211/ieee80211_hostap.c
releng/12.2/sys/net80211/ieee80211_ht.c
releng/12.2/sys/net80211/ieee80211_ht.h
releng/12.2/sys/net80211/ieee80211_input.h
releng/12.2/sys/net80211/ieee80211_ioctl.c
releng/12.2/sys/net80211/ieee80211_ioctl.h
releng/12.2/sys/net80211/ieee80211_node.c
releng/12.2/sys/net80211/ieee80211_node.h
releng/12.2/sys/net80211/ieee80211_output.c
releng/12.2/sys/net80211/ieee80211_phy.h
releng/12.2/sys/net80211/ieee80211_power.c
releng/12.2/sys/net80211/ieee80211_proto.c
releng/12.2/sys/net80211/ieee80211_proto.h
releng/12.2/sys/net80211/ieee80211_regdomain.c
releng/12.2/sys/net80211/ieee80211_scan_sta.c
releng/12.2/sys/net80211/ieee80211_scan_sw.c
releng/12.2/sys/net80211/ieee80211_sta.c
releng/12.2/sys/net80211/ieee80211_sta.h
releng/12.2/sys/net80211/ieee80211_var.h
releng/12.2/sys/net80211/ieee80211_vht.c
releng/12.2/sys/net80211/ieee80211_vht.h
releng/12.2/sys/sys/priv.h
releng/12.2/tools/tools/ath/Makefile
releng/12.2/tools/tools/ath/ath_ee_9300_print/main.c
releng/12.2/tools/tools/ath/athratestats/main.c
releng/12.2/tools/tools/net80211/wlanstats/main.c
releng/12.2/tools/tools/net80211/wlanstats/wlanstats.c
Directory Properties:
releng/12.2/ (props changed)
Modified: releng/12.2/lib/lib80211/lib80211_regdomain.c
==============================================================================
--- releng/12.2/lib/lib80211/lib80211_regdomain.c Sat Sep 12 18:58:36
2020 (r365669)
+++ releng/12.2/lib/lib80211/lib80211_regdomain.c Sat Sep 12 19:33:25
2020 (r365670)
@@ -192,7 +192,7 @@ decode_flag(struct mystate *mt, const char *p, int len
FLAG(IEEE80211_CHAN_VHT40),
FLAG(IEEE80211_CHAN_VHT80),
/*
- * XXX VHT80_80? This likely should be done by
+ * XXX VHT80P80? This likely should be done by
* 80MHz chan logic in net80211 / ifconfig.
*/
FLAG(IEEE80211_CHAN_VHT160),
Modified: releng/12.2/lib/lib80211/lib80211_regdomain.h
==============================================================================
--- releng/12.2/lib/lib80211/lib80211_regdomain.h Sat Sep 12 18:58:36
2020 (r365669)
+++ releng/12.2/lib/lib80211/lib80211_regdomain.h Sat Sep 12 19:33:25
2020 (r365670)
@@ -73,10 +73,10 @@ struct regdomain {
netband_head bands_11b; /* 11b operation */
netband_head bands_11g; /* 11g operation */
netband_head bands_11a; /* 11a operation */
- netband_head bands_11ng;/* 11ng operation */
- netband_head bands_11na;/* 11na operation */
- netband_head bands_11ac;/* 11ac 5GHz operation */
- netband_head bands_11acg;/* 11ac 2GHz operation */
+ netband_head bands_11ng; /* 11ng operation */
+ netband_head bands_11na; /* 11na operation */
+ netband_head bands_11ac; /* 11ac 5GHz operation */
+ netband_head bands_11acg; /* 11ac 2GHz operation */
LIST_ENTRY(regdomain) next;
};
Modified: releng/12.2/lib/lib80211/regdomain.xml
==============================================================================
--- releng/12.2/lib/lib80211/regdomain.xml Sat Sep 12 18:58:36 2020
(r365669)
+++ releng/12.2/lib/lib80211/regdomain.xml Sat Sep 12 19:33:25 2020
(r365670)
@@ -111,6 +111,44 @@
<flags>IEEE80211_CHAN_HT40</flags>
</band>
</netband>
+ <netband mode="11ac">
+ <band>
+ <freqband ref="AC1_5180_5240_20"/>
+ <maxpower>17</maxpower>
+ <flags>IEEE80211_CHAN_HT20</flags>
+ <flags>IEEE80211_CHAN_VHT20</flags>
+ </band>
+ <band>
+ <freqband ref="AC1_5180_5240_40"/>
+ <maxpower>17</maxpower>
+ <flags>IEEE80211_CHAN_HT40</flags>
+ <flags>IEEE80211_CHAN_VHT40</flags>
+ </band>
+ <band>
+ <freqband ref="AC1_5180_5240_80"/>
+ <maxpower>17</maxpower>
+ <flags>IEEE80211_CHAN_HT40</flags>
+ <flags>IEEE80211_CHAN_VHT80</flags>
+ </band>
+ <band>
+ <freqband ref="AC1_5745_5805_20"/>
+ <maxpower>17</maxpower>
+ <flags>IEEE80211_CHAN_HT20</flags>
+ <flags>IEEE80211_CHAN_VHT20</flags>
+ </band>
+ <band>
+ <freqband ref="AC1_5745_5805_40"/>
+ <maxpower>17</maxpower>
+ <flags>IEEE80211_CHAN_HT40</flags>
+ <flags>IEEE80211_CHAN_VHT40</flags>
+ </band>
+ <band>
+ <freqband ref="AC1_5745_5805_80"/>
+ <maxpower>17</maxpower>
+ <flags>IEEE80211_CHAN_HT40</flags>
+ <flags>IEEE80211_CHAN_VHT80</flags>
+ </band>
+ </netband>
</rd>
<!-- FCC3 is FCC w/ DFS on Upper-UNI -->
@@ -1735,6 +1773,21 @@
<chanwidth>20</chanwidth> <chansep>20</chansep>
<flags>IEEE80211_CHAN_A</flags>
</freqband>
+<freqband id="AC1_5180_5240_20">
+ <freqstart>5180</freqstart> <freqend>5240</freqend>
+ <chanwidth>20</chanwidth> <chansep>20</chansep>
+ <flags>IEEE80211_CHAN_A</flags>
+</freqband>
+<freqband id="AC1_5180_5240_40">
+ <freqstart>5180</freqstart> <freqend>5240</freqend>
+ <chanwidth>40</chanwidth> <chansep>20</chansep>
+ <flags>IEEE80211_CHAN_A</flags>
+</freqband>
+<freqband id="AC1_5180_5240_80">
+ <freqstart>5180</freqstart> <freqend>5240</freqend>
+ <chanwidth>80</chanwidth> <chansep>20</chansep>
+ <flags>IEEE80211_CHAN_A</flags>
+</freqband>
<freqband id="H4_5180_5240">
<freqstart>5180</freqstart> <freqend>5240</freqend>
<chanwidth>40</chanwidth> <chansep>20</chansep>
@@ -1823,6 +1876,21 @@
<freqband id="F1_5745_5805">
<freqstart>5745</freqstart> <freqend>5805</freqend>
<chanwidth>20</chanwidth> <chansep>20</chansep>
+ <flags>IEEE80211_CHAN_A</flags>
+</freqband>
+<freqband id="AC1_5745_5805_20">
+ <freqstart>5745</freqstart> <freqend>5805</freqend>
+ <chanwidth>20</chanwidth> <chansep>20</chansep>
+ <flags>IEEE80211_CHAN_A</flags>
+</freqband>
+<freqband id="AC1_5745_5805_40">
+ <freqstart>5745</freqstart> <freqend>5805</freqend>
+ <chanwidth>40</chanwidth> <chansep>20</chansep>
+ <flags>IEEE80211_CHAN_A</flags>
+</freqband>
+<freqband id="AC1_5745_5805_80">
+ <freqstart>5745</freqstart> <freqend>5805</freqend>
+ <chanwidth>80</chanwidth> <chansep>20</chansep>
<flags>IEEE80211_CHAN_A</flags>
</freqband>
<freqband id="H4_5745_5805">
Modified: releng/12.2/sbin/ifconfig/ifieee80211.c
==============================================================================
--- releng/12.2/sbin/ifconfig/ifieee80211.c Sat Sep 12 18:58:36 2020
(r365669)
+++ releng/12.2/sbin/ifconfig/ifieee80211.c Sat Sep 12 19:33:25 2020
(r365670)
@@ -125,8 +125,19 @@
#define IEEE80211_NODE_AMSDU_RX 0x040000 /* AMSDU rx enabled */
#define IEEE80211_NODE_AMSDU_TX 0x080000 /* AMSDU tx enabled */
#define IEEE80211_NODE_VHT 0x100000 /* VHT enabled */
+#define IEEE80211_NODE_LDPC 0x200000 /* LDPC enabled */
+#define IEEE80211_NODE_UAPSD 0x400000 /* UAPSD enabled */
#endif
+/* XXX should also figure out where to put these for k/u-space sharing. */
+#ifndef IEEE80211_FVHT_VHT
+#define IEEE80211_FVHT_VHT 0x000000001 /* CONF: VHT supported
*/
+#define IEEE80211_FVHT_USEVHT40 0x000000002 /* CONF: Use VHT40 */
+#define IEEE80211_FVHT_USEVHT80 0x000000004 /* CONF: Use VHT80 */
+#define IEEE80211_FVHT_USEVHT160 0x000000008 /* CONF: Use VHT160 */
+#define IEEE80211_FVHT_USEVHT80P80 0x000000010 /* CONF: Use VHT 80+80
*/
+#endif
+
#define MAXCHAN 1536 /* max 1.5K channels */
#define MAXCOL 78
@@ -1804,6 +1815,12 @@ set80211ldpc(const char *val, int d, int s, const stru
set80211(s, IEEE80211_IOC_LDPC, ldpc, 0, NULL);
}
+static void
+set80211uapsd(const char *val, int d, int s, const struct afswtch *rafp)
+{
+ set80211(s, IEEE80211_IOC_UAPSD, d, 0, NULL);
+}
+
static
DECL_CMD_FUNC(set80211ampdulimit, val, d)
{
@@ -2159,8 +2176,6 @@ regdomain_addchans(struct ieee80211req_chaninfo *ci,
/*
* VHT first - HT is a subset.
- *
- * XXX TODO: VHT80p80, VHT160 is not yet done.
*/
if (flags & IEEE80211_CHAN_VHT) {
if ((chanFlags & IEEE80211_CHAN_VHT20) &&
@@ -2184,7 +2199,20 @@ regdomain_addchans(struct ieee80211req_chaninfo *ci,
"VHT80 channel\n", freq);
continue;
}
-
+ if ((chanFlags & IEEE80211_CHAN_VHT160) &&
+ (flags & IEEE80211_CHAN_VHT160) == 0) {
+ if (verbose)
+ printf("%u: skip, not a "
+ "VHT160 channel\n", freq);
+ continue;
+ }
+ if ((chanFlags & IEEE80211_CHAN_VHT80P80) &&
+ (flags & IEEE80211_CHAN_VHT80P80) == 0) {
+ if (verbose)
+ printf("%u: skip, not a "
+ "VHT80+80 channel\n", freq);
+ continue;
+ }
flags &= ~IEEE80211_CHAN_VHT;
flags |= chanFlags & IEEE80211_CHAN_VHT;
}
@@ -2370,7 +2398,7 @@ regdomain_makechannels(
&dc->dc_chaninfo);
}
- /* XXX TODO: VHT80_80, VHT160 */
+ /* XXX TODO: VHT80P80, VHT160 */
}
if (!LIST_EMPTY(&rd->bands_11ng) && dc->dc_htcaps != 0) {
@@ -2631,6 +2659,10 @@ getflags(int flags)
*cp++ = 't';
if (flags & IEEE80211_NODE_AMSDU_RX)
*cp++ = 'r';
+ if (flags & IEEE80211_NODE_UAPSD)
+ *cp++ = 'U';
+ if (flags & IEEE80211_NODE_LDPC)
+ *cp++ = 'L';
*cp = '\0';
return flagstring;
}
@@ -3840,8 +3872,8 @@ list_stations(int s)
, "TXSEQ"
, "RXSEQ"
);
- else
- printf("%-17.17s %4s %4s %4s %4s %4s %6s %6s %4s %-7s\n"
+ else
+ printf("%-17.17s %4s %4s %4s %4s %4s %6s %6s %4s %-12s\n"
, "ADDR"
, "AID"
, "CHAN"
@@ -3875,8 +3907,8 @@ list_stations(int s)
, gettxseq(si)
, getrxseq(si)
);
- else
- printf("%s %4u %4d %3dM %4.1f %4d %6d %6d %-4.4s %-7.7s"
+ else
+ printf("%s %4u %4d %3dM %4.1f %4d %6d %6d %-4.4s
%-12.12s"
, ether_ntoa((const struct ether_addr*)
si->isi_macaddr)
, IEEE80211_AID(si->isi_associd)
@@ -3937,8 +3969,11 @@ get_chaninfo(const struct ieee80211_channel *c, int pr
if (IEEE80211_IS_CHAN_TURBO(c))
strlcat(buf, " Turbo", bsize);
if (precise) {
- /* XXX should make VHT80U, VHT80D */
- if (IEEE80211_IS_CHAN_VHT80(c) &&
+ if (IEEE80211_IS_CHAN_VHT80P80(c))
+ strlcat(buf, " vht/80p80", bsize);
+ else if (IEEE80211_IS_CHAN_VHT160(c))
+ strlcat(buf, " vht/160", bsize);
+ else if (IEEE80211_IS_CHAN_VHT80(c) &&
IEEE80211_IS_CHAN_HT40D(c))
strlcat(buf, " vht/80-", bsize);
else if (IEEE80211_IS_CHAN_VHT80(c) &&
@@ -3992,10 +4027,11 @@ print_chaninfo(const struct ieee80211_channel *c, int
static int
chanpref(const struct ieee80211_channel *c)
{
+
+ if (IEEE80211_IS_CHAN_VHT80P80(c))
+ return 90;
if (IEEE80211_IS_CHAN_VHT160(c))
return 80;
- if (IEEE80211_IS_CHAN_VHT80_80(c))
- return 75;
if (IEEE80211_IS_CHAN_VHT80(c))
return 70;
if (IEEE80211_IS_CHAN_VHT40(c))
@@ -4767,6 +4803,23 @@ getid(int s, int ix, void *data, size_t len, int *plen
return 0;
}
+static int
+getdevicename(int s, void *data, size_t len, int *plen)
+{
+ struct ieee80211req ireq;
+
+ (void) memset(&ireq, 0, sizeof(ireq));
+ (void) strlcpy(ireq.i_name, name, sizeof(ireq.i_name));
+ ireq.i_type = IEEE80211_IOC_IC_NAME;
+ ireq.i_val = -1;
+ ireq.i_data = data;
+ ireq.i_len = len;
+ if (ioctl(s, SIOCG80211, &ireq) < 0)
+ return (-1);
+ *plen = ireq.i_len;
+ return (0);
+}
+
static void
ieee80211_status(int s)
{
@@ -5288,30 +5341,40 @@ end:
break;
}
}
+ if (get80211val(s, IEEE80211_IOC_UAPSD, &val) != -1) {
+ switch (val) {
+ case 0:
+ LINE_CHECK("-uapsd");
+ break;
+ case 1:
+ LINE_CHECK("uapsd");
+ break;
+ }
+ }
}
if (IEEE80211_IS_CHAN_VHT(c) || verbose) {
getvhtconf(s);
- if (vhtconf & 0x1)
+ if (vhtconf & IEEE80211_FVHT_VHT)
LINE_CHECK("vht");
else
LINE_CHECK("-vht");
- if (vhtconf & 0x2)
+ if (vhtconf & IEEE80211_FVHT_USEVHT40)
LINE_CHECK("vht40");
else
LINE_CHECK("-vht40");
- if (vhtconf & 0x4)
+ if (vhtconf & IEEE80211_FVHT_USEVHT80)
LINE_CHECK("vht80");
else
LINE_CHECK("-vht80");
- if (vhtconf & 0x8)
- LINE_CHECK("vht80p80");
- else
- LINE_CHECK("-vht80p80");
- if (vhtconf & 0x10)
+ if (vhtconf & IEEE80211_FVHT_USEVHT160)
LINE_CHECK("vht160");
else
LINE_CHECK("-vht160");
+ if (vhtconf & IEEE80211_FVHT_USEVHT80P80)
+ LINE_CHECK("vht80p80");
+ else
+ LINE_CHECK("-vht80p80");
}
if (get80211val(s, IEEE80211_IOC_WME, &wme) != -1) {
@@ -5481,6 +5544,12 @@ end:
}
LINE_BREAK();
+
+ if (getdevicename(s, data, sizeof(data), &len) < 0)
+ return;
+ LINE_CHECK("parent interface: %s", data);
+
+ LINE_BREAK();
}
static int
@@ -5872,6 +5941,8 @@ static struct cmd ieee80211_cmds[] = {
DEF_CMD("-ldpctx", -1, set80211ldpc),
DEF_CMD("ldpc", 3, set80211ldpc), /* NB: tx+rx */
DEF_CMD("-ldpc", -3, set80211ldpc),
+ DEF_CMD("uapsd", 1, set80211uapsd),
+ DEF_CMD("-uapsd", 0, set80211uapsd),
DEF_CMD("puren", 1, set80211puren),
DEF_CMD("-puren", 0, set80211puren),
DEF_CMD("doth", 1, set80211doth),
@@ -5904,16 +5975,16 @@ static struct cmd ieee80211_cmds[] = {
DEF_CMD("-ht40", 0, set80211htconf),
DEF_CMD("ht", 3, set80211htconf), /* NB: 20+40 */
DEF_CMD("-ht", 0, set80211htconf),
- DEF_CMD("vht", 1, set80211vhtconf),
- DEF_CMD("-vht", 0, set80211vhtconf),
- DEF_CMD("vht40", 2, set80211vhtconf),
- DEF_CMD("-vht40", -2, set80211vhtconf),
- DEF_CMD("vht80", 4, set80211vhtconf),
- DEF_CMD("-vht80", -4, set80211vhtconf),
- DEF_CMD("vht80p80", 8, set80211vhtconf),
- DEF_CMD("-vht80p80", -8, set80211vhtconf),
- DEF_CMD("vht160", 16, set80211vhtconf),
- DEF_CMD("-vht160", -16, set80211vhtconf),
+ DEF_CMD("vht", IEEE80211_FVHT_VHT,
set80211vhtconf),
+ DEF_CMD("-vht", 0,
set80211vhtconf),
+ DEF_CMD("vht40", IEEE80211_FVHT_USEVHT40,
set80211vhtconf),
+ DEF_CMD("-vht40", -IEEE80211_FVHT_USEVHT40,
set80211vhtconf),
+ DEF_CMD("vht80", IEEE80211_FVHT_USEVHT80,
set80211vhtconf),
+ DEF_CMD("-vht80", -IEEE80211_FVHT_USEVHT80,
set80211vhtconf),
+ DEF_CMD("vht160", IEEE80211_FVHT_USEVHT160,
set80211vhtconf),
+ DEF_CMD("-vht160", -IEEE80211_FVHT_USEVHT160,
set80211vhtconf),
+ DEF_CMD("vht80p80", IEEE80211_FVHT_USEVHT80P80,
set80211vhtconf),
+ DEF_CMD("-vht80p80", -IEEE80211_FVHT_USEVHT80P80,
set80211vhtconf),
DEF_CMD("rifs", 1, set80211rifs),
DEF_CMD("-rifs", 0, set80211rifs),
DEF_CMD("smps", IEEE80211_HTCAP_SMPS_ENA, set80211smps),
Modified: releng/12.2/share/man/man4/ath.4
==============================================================================
--- releng/12.2/share/man/man4/ath.4 Sat Sep 12 18:58:36 2020
(r365669)
+++ releng/12.2/share/man/man4/ath.4 Sat Sep 12 19:33:25 2020
(r365670)
@@ -28,7 +28,7 @@
.\"
.\" $FreeBSD$
.\"/
-.Dd April 14, 2014
+.Dd June 16, 2020
.Dt ATH 4
.Os
.Sh NAME
@@ -60,10 +60,10 @@ The
driver provides support for wireless network adapters based on
the Atheros AR5210, AR5211, AR5212, AR5416 and AR9300 programming APIs.
These APIs are used by a wide variety of chips; most all chips with
-a PCI and/or CardBus interface are supported.
+a PCI, PCIe and/or CardBus interface are supported.
.Pp
Supported features include 802.11 and 802.3 frames, power management, BSS,
-IBSS, MBSS, TDMA, and host-based access point operation modes.
+IBSS, MBSS, WDS/DWDS TDMA, and host-based access point operation modes.
All host/device interaction is via DMA.
.Pp
Please note that from FreeBSD-9.0, the
@@ -148,12 +148,13 @@ For more information on configuring this device, see
.Pp
Devices supported by the
.Nm
-driver come in either Cardbus or mini-PCI packages.
-Wireless cards in Cardbus slots may be inserted and ejected on the fly.
+driver come in Cardbus, ExpressCard, Mini-PCI and Mini-PCIe packages.
+Wireless cards in Cardbus and ExpressCard slots may be inserted and
+ejected on the fly.
.Sh HARDWARE
The
.Nm
-driver supports all Atheros Cardbus and PCI cards,
+driver supports all Atheros Cardbus, ExpressCard, PCI and PCIe cards,
except those that are based on the AR5005VL chipset.
.Sh EXAMPLES
Join a specific BSS network with WEP encryption:
@@ -293,8 +294,7 @@ device driver first appeared in
Revision A1 of the D-LINK DWL-G520 and DWL-G650 are based on an
Intersil PrismGT chip and are not supported by this driver.
.Sh BUGS
-The driver does not fully enable power-save operation of the chip
-in station mode; consequently power use is suboptimal (e.g. on a laptop).
+The driver does supports optional station mode power-save operation.
.Pp
The AR5210 can only do WEP in hardware; consequently hardware assisted WEP
is disabled in order to allow software implementations of TKIP and CCMP to
Modified: releng/12.2/share/man/man4/net80211.4
==============================================================================
--- releng/12.2/share/man/man4/net80211.4 Sat Sep 12 18:58:36 2020
(r365669)
+++ releng/12.2/share/man/man4/net80211.4 Sat Sep 12 19:33:25 2020
(r365670)
@@ -28,7 +28,7 @@
.\"
.\" $FreeBSD$
.\"
-.Dd July 10, 2009
+.Dd August 7, 2020
.Dt NET80211 4
.Os
.Sh NAME
@@ -393,6 +393,16 @@ Valid values are:
and
.Dv IEEE80211_HWMP_ROOTMODE_RANN
(send broadcast Root Announcement (RANN) frames).
+.It Dv IEEE80211_IOC_IC_NAME
+Return the underlying hardware
+.Xr device 9
+name in the buffer pointed to by
+.Va i_data
+and the name length including terminating NUL character in
+.Va i_len .
+If the buffer length is too small to hold the full name
+.Er EINVAL
+will be returned.
.It Dv IEEE80211_IOC_INACTIVITY
Return whether or not the system handles inactivity processing in
.Va i_val .
Modified: releng/12.2/share/man/man4/run.4
==============================================================================
--- releng/12.2/share/man/man4/run.4 Sat Sep 12 18:58:36 2020
(r365669)
+++ releng/12.2/share/man/man4/run.4 Sat Sep 12 19:33:25 2020
(r365670)
@@ -16,7 +16,7 @@
.\"
.\" $FreeBSD$
.\"
-.Dd November 8, 2018
+.Dd June 16, 2020
.Dt RUN 4
.Os
.Sh NAME
@@ -251,5 +251,5 @@ driver was written by
.Sh CAVEATS
The
.Nm
-driver does not support any of the 802.11n capabilities offered by the
+driver supports some of the 11n capabilities found in the
RT2800, RT3000 and RT3900 chipsets.
Modified: releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300.h
==============================================================================
--- releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300.h Sat Sep 12
18:58:36 2020 (r365669)
+++ releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300.h Sat Sep 12
19:33:25 2020 (r365670)
@@ -19,18 +19,14 @@
#include "ar9300_freebsd_inc.h"
-#define AH_BIG_ENDIAN 4321
-#define AH_LITTLE_ENDIAN 1234
-
-#if _BYTE_ORDER == _BIG_ENDIAN
-#define AH_BYTE_ORDER AH_BIG_ENDIAN
-#else
-#define AH_BYTE_ORDER AH_LITTLE_ENDIAN
-#endif
-
/* XXX doesn't belong here */
#define AR_EEPROM_MODAL_SPURS 5
+/* Ensure that AH_BYTE_ORDER is defined */
+#ifndef AH_BYTE_ORDER
+#error AH_BYTE_ORDER needs to be defined!
+#endif
+
/*
* (a) this should be N(a),
* (b) FreeBSD does define nitems,
@@ -43,10 +39,8 @@
#include "ah_devid.h"
#include "ar9300eep.h" /* For Eeprom definitions */
-
#define AR9300_MAGIC 0x19741014
-
/* MAC register values */
#define INIT_CONFIG_STATUS 0x00000000
@@ -1396,7 +1390,7 @@ extern void ar9300_wowoffload_download_ns_info(struct
extern HAL_BOOL ar9300_reset(struct ath_hal *ah, HAL_OPMODE opmode,
struct ieee80211_channel *chan, HAL_HT_MACMODE macmode, u_int8_t
txchainmask,
u_int8_t rxchainmask, HAL_HT_EXTPROTSPACING extprotspacing,
- HAL_BOOL b_channel_change, HAL_STATUS *status, int is_scan);
+ HAL_BOOL b_channel_change, HAL_STATUS *status, HAL_RESET_TYPE
reset_type, int is_scan);
extern HAL_BOOL ar9300_lean_channel_change(struct ath_hal *ah, HAL_OPMODE
opmode, struct ieee80211_channel *chan,
HAL_HT_MACMODE macmode, u_int8_t txchainmask, u_int8_t rxchainmask);
extern HAL_BOOL ar9300_set_reset_reg(struct ath_hal *ah, u_int32_t type);
@@ -1406,7 +1400,7 @@ extern u_int16_t ar9300_is_single_ant_power_save_poss
extern void ar9300_set_operating_mode(struct ath_hal *ah, int opmode);
extern HAL_BOOL ar9300_phy_disable(struct ath_hal *ah);
extern HAL_BOOL ar9300_disable(struct ath_hal *ah);
-extern HAL_BOOL ar9300_chip_reset(struct ath_hal *ah, struct
ieee80211_channel *);
+extern HAL_BOOL ar9300_chip_reset(struct ath_hal *ah, struct
ieee80211_channel *, HAL_RESET_TYPE type);
extern HAL_BOOL ar9300_calibration(struct ath_hal *ah, struct
ieee80211_channel *chan,
u_int8_t rxchainmask, HAL_BOOL longcal, HAL_BOOL *isIQdone, int
is_scan, u_int32_t *sched_cals);
extern void ar9300_reset_cal_valid(struct ath_hal *ah,
Modified: releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_ani.c
==============================================================================
--- releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_ani.c Sat Sep 12
18:58:36 2020 (r365669)
+++ releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_ani.c Sat Sep 12
19:33:25 2020 (r365670)
@@ -462,13 +462,55 @@ ar9300_ani_control(struct ath_hal *ah, HAL_ANI_CMD cmd
u_int level = param;
u_int is_on;
+ HALDEBUG(ah, HAL_DEBUG_ANI, "%s: cmd=%d, param=%d, chan=%p,
funcmask=0x%08x\n",
+ __func__,
+ cmd,
+ param,
+ chan,
+ ahp->ah_ani_function);
+
+
if (chan == NULL && cmd != HAL_ANI_MODE) {
HALDEBUG(ah, HAL_DEBUG_UNMASKABLE,
"%s: ignoring cmd 0x%02x - no channel\n", __func__, cmd);
return AH_FALSE;
}
- switch (cmd & ahp->ah_ani_function) {
+ /*
+ * These two control the top-level cck/ofdm immunity levels and will
+ * program the rest of the values.
+ */
+ if (cmd == HAL_ANI_NOISE_IMMUNITY_LEVEL) {
+ if (param > HAL_ANI_OFDM_NUM_LEVEL)
+ return AH_FALSE;
+ ar9300_ani_set_odfm_noise_immunity_level(ah, param);
+ return AH_TRUE;
+ }
+
+ if (cmd == HAL_ANI_CCK_NOISE_IMMUNITY_LEVEL) {
+ if (param > HAL_ANI_CCK_NUM_LEVEL)
+ return AH_FALSE;
+ ar9300_ani_set_cck_noise_immunity_level(ah, param);
+ return AH_TRUE;
+ }
+
+ /*
+ * Check to see if this command is available in the
+ * current operating mode.
+ */
+ if (((1 << cmd) & ahp->ah_ani_function) == 0) {
+ HALDEBUG(ah, HAL_DEBUG_ANI,
+ "%s: early check: invalid cmd 0x%02x (allowed=0x%02x)\n",
+ __func__, cmd, ahp->ah_ani_function);
+ return AH_FALSE;
+ }
+
+ /*
+ * The rest of these program in the requested parameter values
+ * into the PHY.
+ */
+ switch (cmd) {
+
case HAL_ANI_OFDM_WEAK_SIGNAL_DETECTION:
{
int m1_thresh_low, m2_thresh_low;
@@ -887,13 +929,16 @@ ar9300_ani_reset(struct ath_hal *ah, HAL_BOOL is_scann
/* only allow a subset of functions in AP mode */
if (AH_PRIVATE(ah)->ah_opmode == HAL_M_HOSTAP) {
if (IS_CHAN_2GHZ(ichan)) {
- ahp->ah_ani_function = (HAL_ANI_SPUR_IMMUNITY_LEVEL |
- HAL_ANI_FIRSTEP_LEVEL |
- HAL_ANI_MRC_CCK);
+ ahp->ah_ani_function = (1 << HAL_ANI_SPUR_IMMUNITY_LEVEL) |
+ (1 << HAL_ANI_FIRSTEP_LEVEL) |
+ (1 << HAL_ANI_MRC_CCK);
} else {
ahp->ah_ani_function = 0;
}
+ } else {
+ ahp->ah_ani_function = HAL_ANI_ALL;
}
+
/* always allow mode (on/off) to be controlled */
ahp->ah_ani_function |= HAL_ANI_MODE;
@@ -1172,6 +1217,7 @@ ar9300_ani_ar_poll(struct ath_hal *ah, const HAL_NODE_
cck_phy_err_cnt = OS_REG_READ(ah, AR_PHY_ERR_2);
/* Populate HAL_ANISTATS */
+ /* XXX TODO: are these correct? */
if (ani_stats) {
ani_stats->cckphyerr_cnt =
cck_phy_err_cnt - ani_state->cck_phy_err_count;
@@ -1212,18 +1258,32 @@ ar9300_ani_ar_poll(struct ath_hal *ah, const HAL_NODE_
return;
}
+ /*
+ * Calculate the OFDM/CCK phy error rate over the listen time interval.
+ * This is used in subsequent math to see if the OFDM/CCK phy error rate
+ * is above or below the threshold checks.
+ */
+
ofdm_phy_err_rate =
ani_state->ofdm_phy_err_count * 1000 / ani_state->listen_time;
cck_phy_err_rate =
ani_state->cck_phy_err_count * 1000 / ani_state->listen_time;
HALDEBUG(ah, HAL_DEBUG_ANI,
- "%s: listen_time=%d OFDM:%d errs=%d/s CCK:%d errs=%d/s ofdm_turn=%d\n",
+ "%s: listen_time=%d (total: %d) OFDM:%d errs=%d/s CCK:%d errs=%d/s
ofdm_turn=%d\n",
__func__, listen_time,
+ ani_state->listen_time,
ani_state->ofdm_noise_immunity_level, ofdm_phy_err_rate,
ani_state->cck_noise_immunity_level, cck_phy_err_rate,
ani_state->ofdms_turn);
+ /*
+ * Check for temporary noise spurs. This is intended to be used by
+ * rate control to check if we should try higher packet rates or not.
+ * If the noise period is short enough then we shouldn't avoid trying
+ * higher rates but if the noise is high/sustained then it's likely
+ * not a great idea to try the higher MCS rates.
+ */
if (ani_state->listen_time >= HAL_NOISE_DETECT_PERIOD) {
old_phy_noise_spur = ani_state->phy_noise_spur;
if (ofdm_phy_err_rate <= ani_state->ofdm_trig_low &&
@@ -1236,7 +1296,7 @@ ar9300_ani_ar_poll(struct ath_hal *ah, const HAL_NODE_
}
if (old_phy_noise_spur != ani_state->phy_noise_spur) {
HALDEBUG(ah, HAL_DEBUG_ANI,
- "%s: enviroment change from %d to %d\n",
+ "%s: environment change from %d to %d\n",
__func__, old_phy_noise_spur, ani_state->phy_noise_spur);
}
}
@@ -1259,6 +1319,10 @@ ar9300_ani_ar_poll(struct ath_hal *ah, const HAL_NODE_
ar9300_ani_lower_immunity(ah);
ani_state->ofdms_turn = !ani_state->ofdms_turn;
}
+ /*
+ * Force an ANI restart regardless of whether the lower immunity
+ * level was met.
+ */
HALDEBUG(ah, HAL_DEBUG_ANI,
"%s: 1 listen_time=%d ofdm=%d/s cck=%d/s - "
"calling ar9300_ani_restart\n",
@@ -1292,6 +1356,13 @@ ar9300_ani_ar_poll(struct ath_hal *ah, const HAL_NODE_
ani_state->ofdms_turn = AH_TRUE;
}
}
+
+ /*
+ * Note that currently this poll function doesn't reset the listen
+ * time after it accumulates a second worth of error samples.
+ * It will continue to accumulate samples until a counter overflows,
+ * or a raise threshold is met, or 5 seconds passes.
+ */
}
/*
Modified: releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_eeprom.c
==============================================================================
--- releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_eeprom.c Sat Sep
12 18:58:36 2020 (r365669)
+++ releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_eeprom.c Sat Sep
12 19:33:25 2020 (r365670)
@@ -3040,6 +3040,33 @@ ar9300_eeprom_set_transmit_power(struct ath_hal *ah,
ahp->reg_dmn = ath_hal_getctl(ah, chan);
/*
+ * After reading FCC/OET 13TR1003 (Directional Gain of IEEE 802.11
+ * MIMO devices employing cyclic delay diversity) and looking at what
+ * ath9k does, let's disable the CDD check until it's clearer exactly
+ * how the maximum cap should be applied here.
+ *
+ * Right now the CDD check is simply unconditionally reducing the
+ * gain of legacy and 1/2 stream rates depending upon the chainmask.
+ * (CDD is used when transmitting rates that don't already use up the
+ * full set of streams - eg OFDM or MCS0-7 on a 2 or 3 chain TX path.)
+ *
+ * It's dropping the 2-chain TX by 3dB and 3-chain by 5dB to "meet"
+ * power spectral density requirements but it's not currently taking
+ * into account how close to the regulatory limit the hardware/antenna
+ * system is already at. It doesn't help that the conductive testing
+ * limits have the array gain at 0dB for all AR9300/derivative
+ * configurations.
+ *
+ * It also doesn't let us do single chain transmit at the full allowed
+ * power for the regulatory/CTL limits as it subtracts it from what's
+ * programmed into the hardware.
+ *
+ * ath9k doesn't factor any of the CDD stuff into account, so I'm going
+ * to disable it here and in the TPC path until I get a better idea
+ * of what to really do here.
+ */
+#if 0
+ /*
* Always use CDD/direct per rate power table for register based approach.
* For FCC, CDD calculations should factor in the array gain, hence
* this adjust call. ETSI and MKK does not have this requirement.
@@ -3050,6 +3077,7 @@ ar9300_eeprom_set_transmit_power(struct ath_hal *ah,
__func__);
ar9300_adjust_reg_txpower_cdd(ah, target_power_val_t2);
}
+#endif
if (ar9300_eeprom_get(ahp, EEP_PAPRD_ENABLED)) {
for (i = 0; i < ar9300_rate_size; i++) {
Modified: releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_freebsd.c
==============================================================================
--- releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_freebsd.c Sat Sep
12 18:58:36 2020 (r365669)
+++ releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_freebsd.c Sat Sep
12 19:33:25 2020 (r365670)
@@ -355,7 +355,7 @@ ar9300_attach_freebsd_ops(struct ath_hal *ah)
ah->ah_setRxDP = ar9300_set_rx_dp;
ah->ah_enableReceive = ar9300_enable_receive;
ah->ah_stopDmaReceive = ar9300_stop_dma_receive_freebsd;
- ah->ah_startPcuReceive = ar9300_start_pcu_receive_freebsd;
+ ah->ah_startPcuReceive = ar9300_start_pcu_receive;
ah->ah_stopPcuReceive = ar9300_stop_pcu_receive;
ah->ah_setMulticastFilter = ar9300_set_multicast_filter;
ah->ah_setMulticastFilterIndex = ar9300SetMulticastFilterIndex;
@@ -543,6 +543,7 @@ ar9300_reset_freebsd(struct ath_hal *ah, HAL_OPMODE op
HAL_HT_EXTPROTSPACING_20, /* always 20Mhz channel spacing */
bChannelChange,
status,
+ resetType,
AH_FALSE); /* XXX should really extend ath_hal_reset() */
return (r);
@@ -678,14 +679,6 @@ ar9300_reset_cal_valid_freebsd(struct ath_hal *ah,
return (is_cal_done);
}
-
-void
-ar9300_start_pcu_receive_freebsd(struct ath_hal *ah)
-{
-
- /* is_scanning flag == NULL */
- ar9300_start_pcu_receive(ah, AH_FALSE);
-}
/*
* FreeBSD will just pass in the descriptor value as 'pa'.
Modified: releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_misc.c
==============================================================================
--- releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_misc.c Sat Sep
12 18:58:36 2020 (r365669)
+++ releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_misc.c Sat Sep
12 19:33:25 2020 (r365670)
@@ -1263,15 +1263,13 @@ ar9300_get_diag_state(struct ath_hal *ah, int request,
if (ani == AH_NULL)
return AH_FALSE;
/* Convert ar9300 HAL to FreeBSD HAL ANI state */
- /* XXX TODO: add all of these to the HAL ANI state structure */
bzero(&ahp->ext_ani_state, sizeof(ahp->ext_ani_state));
- /* XXX should this be OFDM or CCK noise immunity level? */
ahp->ext_ani_state.noiseImmunityLevel = ani->ofdm_noise_immunity_level;
ahp->ext_ani_state.spurImmunityLevel = ani->spur_immunity_level;
ahp->ext_ani_state.firstepLevel = ani->firstep_level;
ahp->ext_ani_state.ofdmWeakSigDetectOff =
ani->ofdm_weak_sig_detect_off;
- /* mrc_cck_off */
- /* cck_noise_immunity_level */
+ ahp->ext_ani_state.mrcCck = !! ani->mrc_cck_off;
+ ahp->ext_ani_state.cckNoiseImmunityLevel =
ani->cck_noise_immunity_level;
ahp->ext_ani_state.listenTime = ani->listen_time;
@@ -1289,12 +1287,18 @@ ar9300_get_diag_state(struct ath_hal *ah, int request,
0 : sizeof(HAL_ANI_STATS);
return AH_TRUE;
case HAL_DIAG_ANI_CMD:
+ {
+ HAL_ANI_CMD savefunc = ahp->ah_ani_function;
if (argsize != 2*sizeof(u_int32_t)) {
return AH_FALSE;
}
+ /* temporarly allow all functions so we can override */
+ ahp->ah_ani_function = HAL_ANI_ALL;
ar9300_ani_control(
ah, ((const u_int32_t *)args)[0], ((const u_int32_t *)args)[1]);
+ ahp->ah_ani_function = savefunc;
return AH_TRUE;
+ }
#if 0
case HAL_DIAG_TXCONT:
/*AR9300_CONTTXMODE(ah, (struct ath_desc *)args, argsize );*/
Modified: releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_phy.c
==============================================================================
--- releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_phy.c Sat Sep 12
18:58:36 2020 (r365669)
+++ releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_phy.c Sat Sep 12
19:33:25 2020 (r365670)
@@ -55,10 +55,12 @@ static inline void ar9300_init_rate_txpower_stbc(struc
const HAL_RATE_TABLE *rt, HAL_BOOL is40,
int rt_ss_offset, int rt_ds_offset,
int rt_ts_offset, u_int8_t chainmask);
+#if 0
static inline void ar9300_adjust_rate_txpower_cdd(struct ath_hal *ah,
const HAL_RATE_TABLE *rt, HAL_BOOL is40,
int rt_ss_offset, int rt_ds_offset,
int rt_ts_offset, u_int8_t chainmask);
+#endif
#define AR9300_11A_RT_OFDM_OFFSET 0
HAL_RATE_TABLE ar9300_11a_table = {
@@ -442,6 +444,8 @@ ar9300_adjust_reg_txpower_cdd(struct ath_hal *ah,
((int16_t)AH_MIN((ahp->twice_antenna_reduction -
(ahp->twice_antenna_gain + AR9300_TXBF_2TX_ARRAY_GAIN)), 0));
cdd_power = ahp->upper_limit[1] + twice_array_gain;
+
+ HALDEBUG(ah, HAL_DEBUG_CALIBRATE, "%s: 2 chain; cdd_power=%d",
__func__, cdd_power);
/* Adjust OFDM legacy rates as well */
for (i = ALL_TARGET_LEGACY_6_24; i <= ALL_TARGET_LEGACY_54; i++) {
if (power_per_rate[i] > cdd_power) {
@@ -471,6 +475,7 @@ ar9300_adjust_reg_txpower_cdd(struct ath_hal *ah,
((int16_t)AH_MIN((ahp->twice_antenna_reduction -
(ahp->twice_antenna_gain + AR9300_TXBF_3TX_ARRAY_GAIN)), 0));
cdd_power = ahp->upper_limit[2] + twice_array_gain;
+ HALDEBUG(ah, HAL_DEBUG_CALIBRATE, "%s: 3 chain; cdd_power=%d",
__func__, cdd_power);
/* Adjust OFDM legacy rates as well */
for (i = ALL_TARGET_LEGACY_6_24; i <= ALL_TARGET_LEGACY_54; i++) {
if (power_per_rate[i] > cdd_power) {
@@ -531,6 +536,7 @@ ar9300_init_rate_txpower(struct ath_hal *ah, u_int mod
AR9300_11NA_RT_HT_SS_OFFSET,
AR9300_11NA_RT_HT_DS_OFFSET,
AR9300_11NA_RT_HT_TS_OFFSET, chainmask);
+#if 0
/* For FCC the array gain has to be factored for CDD mode */
if (is_reg_dmn_fcc(ath_hal_getctl(ah, chan))) {
ar9300_adjust_rate_txpower_cdd(ah, rt, is40,
@@ -538,6 +544,7 @@ ar9300_init_rate_txpower(struct ath_hal *ah, u_int mod
AR9300_11NA_RT_HT_DS_OFFSET,
AR9300_11NA_RT_HT_TS_OFFSET, chainmask);
}
+#endif
break;
case HAL_MODE_11G:
ar9300_init_rate_txpower_cck(ah, rt, power_per_rate, chainmask);
@@ -561,6 +568,7 @@ ar9300_init_rate_txpower(struct ath_hal *ah, u_int mod
AR9300_11NG_RT_HT_SS_OFFSET,
AR9300_11NG_RT_HT_DS_OFFSET,
AR9300_11NG_RT_HT_TS_OFFSET, chainmask);
+#if 0
/* For FCC the array gain needs to be factored for CDD mode */
if (is_reg_dmn_fcc(ath_hal_getctl(ah, chan))) {
ar9300_adjust_rate_txpower_cdd(ah, rt, is40,
@@ -568,6 +576,7 @@ ar9300_init_rate_txpower(struct ath_hal *ah, u_int mod
AR9300_11NG_RT_HT_DS_OFFSET,
AR9300_11NG_RT_HT_TS_OFFSET, chainmask);
}
+#endif
break;
default:
HALDEBUG(ah, HAL_DEBUG_POWER_MGMT, "%s: invalid mode 0x%x\n",
@@ -941,6 +950,10 @@ ar9300_init_rate_txpower_stbc(struct ath_hal *ah, cons
return;
}
+/*
+ * To see why this is disabled, look at ar9300_eeprom.c for FCC/OET 13TR1003.
+ */
+#if 0
static inline void
ar9300_adjust_rate_txpower_cdd(struct ath_hal *ah, const HAL_RATE_TABLE *rt,
HAL_BOOL is40,
@@ -1037,6 +1050,7 @@ ar9300_adjust_rate_txpower_cdd(struct ath_hal *ah, con
return;
}
+#endif
void ar9300_disp_tpc_tables(struct ath_hal *ah)
{
Modified: releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_reset.c
==============================================================================
--- releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_reset.c Sat Sep
12 18:58:36 2020 (r365669)
+++ releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_reset.c Sat Sep
12 19:33:25 2020 (r365670)
@@ -2064,7 +2064,7 @@ ar9300_set_rf_mode(struct ath_hal *ah, struct ieee8021
* Places the hardware into reset and then pulls it out of reset
*/
HAL_BOOL
-ar9300_chip_reset(struct ath_hal *ah, struct ieee80211_channel *chan)
+ar9300_chip_reset(struct ath_hal *ah, struct ieee80211_channel *chan,
HAL_RESET_TYPE reset_type)
{
struct ath_hal_9300 *ahp = AH9300(ah);
int type = HAL_RESET_WARM;
@@ -2080,8 +2080,13 @@ ar9300_chip_reset(struct ath_hal *ah, struct ieee80211
*/
if (ahp->ah_chip_full_sleep ||
(ah->ah_config.ah_force_full_reset == 1) ||
+ (reset_type == HAL_RESET_FORCE_COLD) ||
+ (reset_type == HAL_RESET_BBPANIC) ||
OS_REG_READ(ah, AR_Q_TXE) ||
(OS_REG_READ(ah, AR_CR) & AR_CR_RXE)) {
+ HALDEBUG(ah, HAL_DEBUG_RESET,
+ "%s: full reset; reset_type=%d, full_sleep=%d\n",
+ __func__, reset_type, ahp->ah_chip_full_sleep);
type = HAL_RESET_COLD;
}
@@ -4510,7 +4515,7 @@ HAL_BOOL
ar9300_reset(struct ath_hal *ah, HAL_OPMODE opmode, struct ieee80211_channel
*chan,
HAL_HT_MACMODE macmode, u_int8_t txchainmask, u_int8_t rxchainmask,
HAL_HT_EXTPROTSPACING extprotspacing, HAL_BOOL b_channel_change,
- HAL_STATUS *status, int is_scan)
+ HAL_STATUS *status, HAL_RESET_TYPE reset_type, int is_scan)
{
#define FAIL(_code) do { ecode = _code; goto bad; } while (0)
u_int32_t save_led_state;
@@ -4864,7 +4869,7 @@ ar9300_reset(struct ath_hal *ah, HAL_OPMODE opmode, st
/* Mark PHY inactive prior to reset, to be undone in ar9300_init_bb () */
ar9300_mark_phy_inactive(ah);
- if (!ar9300_chip_reset(ah, chan)) {
+ if (!ar9300_chip_reset(ah, chan, reset_type)) {
HALDEBUG(ah, HAL_DEBUG_RESET, "%s: chip reset failed\n", __func__);
FAIL(HAL_EIO);
}
Modified: releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_stub_funcs.c
==============================================================================
--- releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_stub_funcs.c Sat Sep
12 18:58:36 2020 (r365669)
+++ releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_stub_funcs.c Sat Sep
12 19:33:25 2020 (r365670)
@@ -691,7 +691,7 @@ ar9300_Stub_StopDmaReceive(struct ath_hal *ah)
}
void
-ar9300_Stub_StartPcuReceive(struct ath_hal *ah)
+ar9300_Stub_StartPcuReceive(struct ath_hal *ah, HAL_BOOL is_scanning)
{
ath_hal_printf(ah, "%s: called\n", __func__);
Modified: releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_stub_funcs.h
==============================================================================
--- releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_stub_funcs.h Sat Sep
12 18:58:36 2020 (r365669)
+++ releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_stub_funcs.h Sat Sep
12 19:33:25 2020 (r365670)
@@ -112,7 +112,7 @@ extern void ar9300_Stub_SetRxDP(struct ath_hal *ah, ui
HAL_RX_QUEUE);
extern void ar9300_Stub_EnableReceive(struct ath_hal *ah);
extern HAL_BOOL ar9300_Stub_StopDmaReceive(struct ath_hal *ah);
-extern void ar9300_Stub_StartPcuReceive(struct ath_hal *ah);
+extern void ar9300_Stub_StartPcuReceive(struct ath_hal *ah, HAL_BOOL);
extern void ar9300_Stub_StopPcuReceive(struct ath_hal *ah);
extern void ar9300_Stub_SetMulticastFilter(struct ath_hal *ah,
uint32_t filter0, uint32_t filter1);
Modified: releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300eep.h
==============================================================================
--- releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300eep.h Sat Sep 12
18:58:36 2020 (r365669)
+++ releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300eep.h Sat Sep 12
19:33:25 2020 (r365670)
@@ -18,13 +18,17 @@
#define _ATH_AR9300_EEP_H_
#include "opt_ah.h"
-
#include "ah.h"
#if defined(WIN32) || defined(WIN64)
#pragma pack (push, ar9300, 1)
#endif
+/* Ensure that AH_BYTE_ORDER is defined */
+#ifndef AH_BYTE_ORDER
+#error AH_BYTE_ORDER needs to be defined!
+#endif
+
/* FreeBSD extras - should be in ah_eeprom.h ? */
#define AR_EEPROM_EEPCAP_COMPRESS_DIS 0x0001
#define AR_EEPROM_EEPCAP_AES_DIS 0x0002
@@ -345,11 +349,13 @@ typedef struct CalCtlEdgePwr {
u_int8_t flag :2,
t_power :6;
} __packed CAL_CTL_EDGE_PWR;
-#else
+#elif AH_BYTE_ORDER == AH_LITTLE_ENDIAN
typedef struct CalCtlEdgePwr {
u_int8_t t_power :6,
flag :2;
} __packed CAL_CTL_EDGE_PWR;
+#else
+#error AH_BYTE_ORDER undefined!
#endif
typedef struct ospCalCtlData_5G {
Modified: releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300template_ap121.h
==============================================================================
--- releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300template_ap121.h
Sat Sep 12 18:58:36 2020 (r365669)
+++ releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300template_ap121.h
Sat Sep 12 19:33:25 2020 (r365670)
@@ -25,6 +25,11 @@
#ifndef __ar9300templateAP121_h__
#define __ar9300templateAP121_h__
+/* Ensure that AH_BYTE_ORDER is defined */
+#ifndef AH_BYTE_ORDER
+#error AH_BYTE_ORDER needs to be defined!
+#endif
+
static ar9300_eeprom_t ar9300_template_ap121=
{
Modified:
releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300template_aphrodite.h
==============================================================================
--- releng/12.2/sys/contrib/dev/ath/ath_hal/ar9300/ar9300template_aphrodite.h
Sat Sep 12 18:58:36 2020 (r365669)
*** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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