Author: erj
Date: Mon Sep 14 23:49:17 2020
New Revision: 365736
URL: https://svnweb.freebsd.org/changeset/base/365736
Log:
MFS r365647: ixl powerpc64 fixes
PR: 249254
Approved by: re (gjb@)
Modified:
releng/12.2/sys/dev/ixl/i40e_prototype.h
releng/12.2/sys/dev/ixl/ixl_pf_main.c
Directory Properties:
releng/12.2/ (props changed)
Modified: releng/12.2/sys/dev/ixl/i40e_prototype.h
==============================================================================
--- releng/12.2/sys/dev/ixl/i40e_prototype.h Mon Sep 14 23:30:04 2020
(r365735)
+++ releng/12.2/sys/dev/ixl/i40e_prototype.h Mon Sep 14 23:49:17 2020
(r365736)
@@ -627,6 +627,4 @@ enum i40e_status_code i40e_read_phy_register(struct i4
enum i40e_status_code i40e_write_phy_register(struct i40e_hw *hw,
u8 page, u16 reg, u8 phy_addr, u16 value);
u8 i40e_get_phy_address(struct i40e_hw *hw, u8 dev_num);
-enum i40e_status_code i40e_blink_phy_link_led(struct i40e_hw *hw,
- u32 time, u32 interval);
#endif /* _I40E_PROTOTYPE_H_ */
Modified: releng/12.2/sys/dev/ixl/ixl_pf_main.c
==============================================================================
--- releng/12.2/sys/dev/ixl/ixl_pf_main.c Mon Sep 14 23:30:04 2020
(r365735)
+++ releng/12.2/sys/dev/ixl/ixl_pf_main.c Mon Sep 14 23:49:17 2020
(r365736)
@@ -729,20 +729,22 @@ ixl_switch_config(struct ixl_pf *pf)
if (pf->dbg_mask & IXL_DBG_SWITCH_INFO) {
device_printf(dev,
"Switch config: header reported: %d in structure, %d
total\n",
- sw_config->header.num_reported,
sw_config->header.num_total);
- for (int i = 0; i < sw_config->header.num_reported; i++) {
+ LE16_TO_CPU(sw_config->header.num_reported),
+ LE16_TO_CPU(sw_config->header.num_total));
+ for (int i = 0;
+ i < LE16_TO_CPU(sw_config->header.num_reported); i++) {
device_printf(dev,
"-> %d: type=%d seid=%d uplink=%d downlink=%d\n", i,
sw_config->element[i].element_type,
- sw_config->element[i].seid,
- sw_config->element[i].uplink_seid,
- sw_config->element[i].downlink_seid);
+ LE16_TO_CPU(sw_config->element[i].seid),
+ LE16_TO_CPU(sw_config->element[i].uplink_seid),
+ LE16_TO_CPU(sw_config->element[i].downlink_seid));
}
}
/* Simplified due to a single VSI */
- vsi->uplink_seid = sw_config->element[0].uplink_seid;
- vsi->downlink_seid = sw_config->element[0].downlink_seid;
- vsi->seid = sw_config->element[0].seid;
+ vsi->uplink_seid = LE16_TO_CPU(sw_config->element[0].uplink_seid);
+ vsi->downlink_seid = LE16_TO_CPU(sw_config->element[0].downlink_seid);
+ vsi->seid = LE16_TO_CPU(sw_config->element[0].seid);
return (ret);
}
@@ -1219,12 +1221,14 @@ ixl_add_hw_filters(struct ixl_vsi *vsi, int flags, int
bcopy(f->macaddr, b->mac_addr, ETHER_ADDR_LEN);
if (f->vlan == IXL_VLAN_ANY) {
b->vlan_tag = 0;
- b->flags = I40E_AQC_MACVLAN_ADD_IGNORE_VLAN;
+ b->flags = CPU_TO_LE16(
+ I40E_AQC_MACVLAN_ADD_IGNORE_VLAN);
} else {
- b->vlan_tag = f->vlan;
+ b->vlan_tag = CPU_TO_LE16(f->vlan);
b->flags = 0;
}
- b->flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
+ b->flags |= CPU_TO_LE16(
+ I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
f->flags &= ~IXL_FILTER_ADD;
j++;
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