Author: mmel
Date: Sun Sep 27 09:27:39 2020
New Revision: 366195
URL: https://svnweb.freebsd.org/changeset/base/366195
Log:
Reapply r366193 with proper commit log.
Don't map same physical memory multiple times with different cache attributes.
This is explicitly stated as architectural undefined behavior, leading to
coherency issues sooner or later.
Modified:
head/sys/arm64/arm64/locore.S
Modified: head/sys/arm64/arm64/locore.S
==============================================================================
--- head/sys/arm64/arm64/locore.S Sun Sep 27 09:24:31 2020
(r366194)
+++ head/sys/arm64/arm64/locore.S Sun Sep 27 09:27:39 2020
(r366195)
@@ -498,7 +498,7 @@ common:
cbz x19, 1f
/* Create the identity mapping for FDT data (2 MiB max) */
- mov x7, #(ATTR_S1_nG | ATTR_S1_IDX(VM_MEMATTR_UNCACHEABLE))
+ mov x7, #(ATTR_S1_nG | ATTR_S1_IDX(VM_MEMATTR_WRITE_BACK))
mov x9, x0
mov x8, x0 /* VA start (== PA start) */
mov x10, #1
@@ -508,7 +508,7 @@ common:
#endif
/* Create the VA = PA map */
- mov x7, #(ATTR_S1_nG | ATTR_S1_IDX(VM_MEMATTR_UNCACHEABLE))
+ mov x7, #(ATTR_S1_nG | ATTR_S1_IDX(VM_MEMATTR_WRITE_BACK))
mov x9, x27
mov x8, x9 /* VA start (== PA start) */
mov x10, #1
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