Author: jkim
Date: Wed Oct 20 23:41:16 2010
New Revision: 214122
URL: http://svn.freebsd.org/changeset/base/214122

Log:
  Update PCI power management registers per PCI Bus Power Management Interface
  Specification Rev. 1.2.  Rename pp_pcmcsr field of PM capabilities to pp_bse
  to avoid further confusions and adjust some comments accordingly.  The real
  PMCSR (Power Management Control/Status Register) is PCIR_POWER_STATUS and
  it is actually BSE (PCI-to-PCI Bridge Support Extensions) register.

Modified:
  head/sys/dev/pci/pci.c
  head/sys/dev/pci/pcireg.h
  head/sys/dev/pci/pcivar.h

Modified: head/sys/dev/pci/pci.c
==============================================================================
--- head/sys/dev/pci/pci.c      Wed Oct 20 21:19:36 2010        (r214121)
+++ head/sys/dev/pci/pci.c      Wed Oct 20 23:41:16 2010        (r214122)
@@ -600,7 +600,7 @@ pci_read_extcap(device_t pcib, pcicfgreg
                        if (cfg->pp.pp_cap == 0) {
                                cfg->pp.pp_cap = REG(ptr + PCIR_POWER_CAP, 2);
                                cfg->pp.pp_status = ptr + PCIR_POWER_STATUS;
-                               cfg->pp.pp_pmcsr = ptr + PCIR_POWER_PMCSR;
+                               cfg->pp.pp_bse = ptr + PCIR_POWER_BSE;
                                if ((nextptr - ptr) > PCIR_POWER_DATA)
                                        cfg->pp.pp_data = ptr + PCIR_POWER_DATA;
                        }

Modified: head/sys/dev/pci/pcireg.h
==============================================================================
--- head/sys/dev/pci/pcireg.h   Wed Oct 20 21:19:36 2010        (r214121)
+++ head/sys/dev/pci/pcireg.h   Wed Oct 20 23:41:16 2010        (r214122)
@@ -427,12 +427,16 @@
 #define        PCIR_POWER_CAP          0x2
 #define        PCIM_PCAP_SPEC                  0x0007
 #define        PCIM_PCAP_PMEREQCLK             0x0008
-#define        PCIM_PCAP_PMEREQPWR             0x0010
 #define        PCIM_PCAP_DEVSPECINIT           0x0020
-#define        PCIM_PCAP_DYNCLOCK              0x0040
-#define        PCIM_PCAP_SECCLOCK              0x00c0
-#define        PCIM_PCAP_CLOCKMASK             0x00c0
-#define        PCIM_PCAP_REQFULLCLOCK          0x0100
+#define        PCIM_PCAP_AUXPWR_0              0x0000
+#define        PCIM_PCAP_AUXPWR_55             0x0040
+#define        PCIM_PCAP_AUXPWR_100            0x0080
+#define        PCIM_PCAP_AUXPWR_160            0x00c0
+#define        PCIM_PCAP_AUXPWR_220            0x0100
+#define        PCIM_PCAP_AUXPWR_270            0x0140
+#define        PCIM_PCAP_AUXPWR_320            0x0180
+#define        PCIM_PCAP_AUXPWR_375            0x01c0
+#define        PCIM_PCAP_AUXPWRMASK            0x01c0
 #define        PCIM_PCAP_D1SUPP                0x0200
 #define        PCIM_PCAP_D2SUPP                0x0400
 #define        PCIM_PCAP_D0PME                 0x0800
@@ -447,16 +451,17 @@
 #define        PCIM_PSTAT_D2                   0x0002
 #define        PCIM_PSTAT_D3                   0x0003
 #define        PCIM_PSTAT_DMASK                0x0003
-#define        PCIM_PSTAT_REPENABLE            0x0010
+#define        PCIM_PSTAT_NOSOFTRESET          0x0008
 #define        PCIM_PSTAT_PMEENABLE            0x0100
 #define        PCIM_PSTAT_D0POWER              0x0000
 #define        PCIM_PSTAT_D1POWER              0x0200
 #define        PCIM_PSTAT_D2POWER              0x0400
 #define        PCIM_PSTAT_D3POWER              0x0600
 #define        PCIM_PSTAT_D0HEAT               0x0800
-#define        PCIM_PSTAT_D1HEAT               0x1000
-#define        PCIM_PSTAT_D2HEAT               0x1200
-#define        PCIM_PSTAT_D3HEAT               0x1400
+#define        PCIM_PSTAT_D1HEAT               0x0a00
+#define        PCIM_PSTAT_D2HEAT               0x0c00
+#define        PCIM_PSTAT_D3HEAT               0x0e00
+#define        PCIM_PSTAT_DATASELMASK          0x1e00
 #define        PCIM_PSTAT_DATAUNKN             0x0000
 #define        PCIM_PSTAT_DATADIV10            0x2000
 #define        PCIM_PSTAT_DATADIV100           0x4000
@@ -464,11 +469,10 @@
 #define        PCIM_PSTAT_DATADIVMASK          0x6000
 #define        PCIM_PSTAT_PME                  0x8000
 
-#define        PCIR_POWER_PMCSR        0x6
-#define        PCIM_PMCSR_DCLOCK               0x10
-#define        PCIM_PMCSR_B2SUPP               0x20
-#define        PCIM_BMCSR_B3SUPP               0x40
-#define        PCIM_BMCSR_BPCE                 0x80
+#define        PCIR_POWER_BSE          0x6
+#define        PCIM_PMCSR_BSE_D3B3             0x00
+#define        PCIM_PMCSR_BSE_D3B2             0x40
+#define        PCIM_PMCSR_BSE_BPCCE            0x80
 
 #define        PCIR_POWER_DATA         0x7
 

Modified: head/sys/dev/pci/pcivar.h
==============================================================================
--- head/sys/dev/pci/pcivar.h   Wed Oct 20 21:19:36 2010        (r214121)
+++ head/sys/dev/pci/pcivar.h   Wed Oct 20 23:41:16 2010        (r214122)
@@ -42,9 +42,9 @@ typedef uint64_t pci_addr_t;
 /* Interesting values for PCI power management */
 struct pcicfg_pp {
     uint16_t   pp_cap;         /* PCI power management capabilities */
-    uint8_t    pp_status;      /* config space address of PCI power status reg 
*/
-    uint8_t    pp_pmcsr;       /* config space address of PMCSR reg */
-    uint8_t    pp_data;        /* config space address of PCI power data reg */
+    uint8_t    pp_status;      /* conf. space addr. of PM control/status reg */
+    uint8_t    pp_bse;         /* conf. space addr. of PM BSE reg */
+    uint8_t    pp_data;        /* conf. space addr. of PM data reg */
 };
  
 struct vpd_readonly {
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