Author: nwhitehorn
Date: Sun Oct 31 22:55:51 2010
New Revision: 214607
URL: http://svn.freebsd.org/changeset/base/214607

Log:
  Next-to-leading-order perturbation of synchronization operations for
  switching the user segment register. All races should now be closed and
  a minimum of pipelines flushes be required to close them.

Modified:
  head/sys/powerpc/aim/copyinout.c
  head/sys/powerpc/aim/swtch32.S
  head/sys/powerpc/aim/swtch64.S

Modified: head/sys/powerpc/aim/copyinout.c
==============================================================================
--- head/sys/powerpc/aim/copyinout.c    Sun Oct 31 22:46:39 2010        
(r214606)
+++ head/sys/powerpc/aim/copyinout.c    Sun Oct 31 22:55:51 2010        
(r214607)
@@ -117,9 +117,9 @@ set_user_sr(pmap_t pm, const void *addr)
        if (curthread->td_pcb->pcb_cpu.aim.usr_vsid == vsid)
                return;
 
-       __asm __volatile ("sync; mtsr %0,%1; sync; isync" :: "n"(USER_SR),
-           "r"(vsid));
+       __asm __volatile("isync");
        curthread->td_pcb->pcb_cpu.aim.usr_vsid = vsid;
+       __asm __volatile("mtsr %0,%1; isync" :: "n"(USER_SR), "r"(vsid));
 }
 #endif
 

Modified: head/sys/powerpc/aim/swtch32.S
==============================================================================
--- head/sys/powerpc/aim/swtch32.S      Sun Oct 31 22:46:39 2010        
(r214606)
+++ head/sys/powerpc/aim/swtch32.S      Sun Oct 31 22:55:51 2010        
(r214607)
@@ -89,7 +89,6 @@ ENTRY(cpu_switch)
        mflr    %r16                    /* Save the link register */
        stw     %r16,PCB_LR(%r6)
        mfsr    %r16,USER_SR            /* Save USER_SR for copyin/out */
-       isync
        stw     %r16,PCB_AIM_USR_VSID(%r6)
        stw     %r1,PCB_SP(%r6)         /* Save the stack pointer */
        stw     %r2,PCB_TOC(%r6)        /* Save the TOC pointer */
@@ -162,6 +161,7 @@ blocked_loop:
        lwz     %r5,PCB_LR(%r3)         /* Load the link register */
        mtlr    %r5
        lwz     %r5,PCB_AIM_USR_VSID(%r3) /* Load the USER_SR segment reg */
+       isync
        mtsr    USER_SR,%r5
        isync
        lwz     %r1,PCB_SP(%r3)         /* Load the stack pointer */

Modified: head/sys/powerpc/aim/swtch64.S
==============================================================================
--- head/sys/powerpc/aim/swtch64.S      Sun Oct 31 22:46:39 2010        
(r214606)
+++ head/sys/powerpc/aim/swtch64.S      Sun Oct 31 22:55:51 2010        
(r214607)
@@ -113,7 +113,6 @@ ENTRY(cpu_switch)
        li      %r15,0                  /* Save user segment for copyin/out */
        li      %r16,USER_SLB_SLOT
        slbmfev %r15, %r16
-       isync
        std     %r15,PCB_AIM_USR_VSID(%r6)
 
        mr      %r14,%r3                /* Copy the old thread ptr... */
@@ -222,6 +221,7 @@ blocked_loop:
        ori     %r5,%r5,user_a...@highera
        sldi    %r5,%r5,32
        oris    %r5,%r5,user_a...@ha
+       isync
        slbie   %r5
        lis     %r6,user_slb_s...@highesta
        ori     %r6,%r6,user_slb_s...@highera
@@ -230,8 +230,8 @@ blocked_loop:
        ori     %r6,%r6,user_slb_s...@l
        ld      %r5,PCB_AIM_USR_VSID(%r3)
        slbmte  %r5,%r6
-
        isync
+
        /*
         * Perform a dummy stdcx. to clear any reservations we may have
         * inherited from the previous thread. It doesn't matter if the
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