Author: adrian
Date: Sat May 21 09:23:18 2011
New Revision: 222157
URL: http://svn.freebsd.org/changeset/base/222157
Log:
The Merlin analog register bank is from 0x7800 -> 0x78fc; fix the code
to reflect this.
Modified:
head/sys/dev/ath/ath_hal/ah.c
head/sys/dev/ath/ath_hal/ar9002/ar9280_attach.c
Modified: head/sys/dev/ath/ath_hal/ah.c
==============================================================================
--- head/sys/dev/ath/ath_hal/ah.c Sat May 21 01:44:13 2011
(r222156)
+++ head/sys/dev/ath/ath_hal/ah.c Sat May 21 09:23:18 2011
(r222157)
@@ -1069,7 +1069,7 @@ ath_hal_ini_write(struct ath_hal *ah, co
HAL_INI_VAL(ia, r, col));
/* Analog shift register delay seems needed for Merlin - PR
kern/154220 */
- if (HAL_INI_VAL(ia, r, 0) >= 0x7800 && HAL_INI_VAL(ia, r, 0) <
0x78a0)
+ if (HAL_INI_VAL(ia, r, 0) >= 0x7800 && HAL_INI_VAL(ia, r, 0) <
0x7900)
OS_DELAY(100);
DMA_YIELD(regWr);
Modified: head/sys/dev/ath/ath_hal/ar9002/ar9280_attach.c
==============================================================================
--- head/sys/dev/ath/ath_hal/ar9002/ar9280_attach.c Sat May 21 01:44:13
2011 (r222156)
+++ head/sys/dev/ath/ath_hal/ar9002/ar9280_attach.c Sat May 21 09:23:18
2011 (r222157)
@@ -430,7 +430,7 @@ ar9280WriteIni(struct ath_hal *ah, const
OS_REG_WRITE(ah, reg, val);
/* Analog shift register delay seems needed for Merlin - PR
kern/154220 */
- if (reg >= 0x7800 && reg < 0x78a0)
+ if (reg >= 0x7800 && reg < 0x7900)
OS_DELAY(100);
DMA_YIELD(regWrites);
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