Author: nwhitehorn
Date: Tue Jun 7 14:36:13 2011
New Revision: 222823
URL: http://svn.freebsd.org/changeset/base/222823
Log:
MFC r222666:
Fix a typo derived from a mismerge from mmu_oea that would cause
pmap_sync_icache() to sync random (possibly uncached or nonexisting!)
memory, causing kernel page faults or machine checks, most easily
triggered by using GDB. While here, add an additional safeguard to only
sync cacheable memory.
Modified:
stable/8/sys/powerpc/aim/mmu_oea64.c
Directory Properties:
stable/8/sys/ (props changed)
stable/8/sys/amd64/include/xen/ (props changed)
stable/8/sys/cddl/contrib/opensolaris/ (props changed)
stable/8/sys/contrib/dev/acpica/ (props changed)
stable/8/sys/contrib/pf/ (props changed)
Modified: stable/8/sys/powerpc/aim/mmu_oea64.c
==============================================================================
--- stable/8/sys/powerpc/aim/mmu_oea64.c Tue Jun 7 14:35:18 2011
(r222822)
+++ stable/8/sys/powerpc/aim/mmu_oea64.c Tue Jun 7 14:36:13 2011
(r222823)
@@ -2567,8 +2567,8 @@ moea64_sync_icache(mmu_t mmu, pmap_t pm,
lim = round_page(va);
len = MIN(lim - va, sz);
pvo = moea64_pvo_find_va(pm, va & ~ADDR_POFF, NULL);
- if (pvo != NULL) {
- pa = (pvo->pvo_pte.pte.pte_lo & LPTE_RPGN) |
+ if (pvo != NULL && !(pvo->pvo_pte.lpte.pte_lo & LPTE_I)) {
+ pa = (pvo->pvo_pte.lpte.pte_lo & LPTE_RPGN) |
(va & ADDR_POFF);
moea64_syncicache(pm, va, pa, len);
}
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