Author: hselasky
Date: Tue Nov 13 17:04:44 2012
New Revision: 242985
URL: http://svnweb.freebsd.org/changeset/base/242985
Log:
MFC r238551 and r239617:
Add support for Intel Panther/Lynx Point XHCI port routing.
Modified:
stable/8/sys/dev/usb/controller/xhci.c
stable/8/sys/dev/usb/controller/xhci.h
stable/8/sys/dev/usb/controller/xhci_pci.c
stable/8/sys/dev/usb/controller/xhcireg.h
Directory Properties:
stable/8/sys/ (props changed)
stable/8/sys/dev/ (props changed)
stable/8/sys/dev/usb/ (props changed)
Modified: stable/8/sys/dev/usb/controller/xhci.c
==============================================================================
--- stable/8/sys/dev/usb/controller/xhci.c Tue Nov 13 17:01:58 2012
(r242984)
+++ stable/8/sys/dev/usb/controller/xhci.c Tue Nov 13 17:04:44 2012
(r242985)
@@ -84,14 +84,17 @@ __FBSDID("$FreeBSD$");
((uint8_t *)&(((struct xhci_softc *)0)->sc_bus))))
#ifdef USB_DEBUG
-static int xhcidebug = 0;
+static int xhcidebug;
+static int xhciroute;
SYSCTL_NODE(_hw_usb, OID_AUTO, xhci, CTLFLAG_RW, 0, "USB XHCI");
SYSCTL_INT(_hw_usb_xhci, OID_AUTO, debug, CTLFLAG_RW,
&xhcidebug, 0, "Debug level");
+SYSCTL_INT(_hw_usb_xhci, OID_AUTO, xhci_port_route, CTLFLAG_RW,
+ &xhciroute, 0, "Routing bitmap for switching EHCI ports to XHCI
controller");
TUNABLE_INT("hw.usb.xhci.debug", &xhcidebug);
-
+TUNABLE_INT("hw.usb.xhci.xhci_port_route", &xhciroute);
#endif
#define XHCI_INTR_ENDPT 1
@@ -177,6 +180,16 @@ xhci_dump_device(struct xhci_softc *sc,
}
#endif
+uint32_t
+xhci_get_port_route(void)
+{
+#ifdef USB_DEBUG
+ return (0xFFFFFFFFU ^ ((uint32_t)xhciroute));
+#else
+ return (0xFFFFFFFFU);
+#endif
+}
+
static void
xhci_iterate_hw_softc(struct usb_bus *bus, usb_bus_mem_sub_cb_t *cb)
{
Modified: stable/8/sys/dev/usb/controller/xhci.h
==============================================================================
--- stable/8/sys/dev/usb/controller/xhci.h Tue Nov 13 17:01:58 2012
(r242984)
+++ stable/8/sys/dev/usb/controller/xhci.h Tue Nov 13 17:04:44 2012
(r242985)
@@ -490,6 +490,7 @@ struct xhci_softc {
/* prototypes */
+uint32_t xhci_get_port_route(void);
usb_error_t xhci_halt_controller(struct xhci_softc *);
usb_error_t xhci_init(struct xhci_softc *, device_t);
usb_error_t xhci_start_controller(struct xhci_softc *);
Modified: stable/8/sys/dev/usb/controller/xhci_pci.c
==============================================================================
--- stable/8/sys/dev/usb/controller/xhci_pci.c Tue Nov 13 17:01:58 2012
(r242984)
+++ stable/8/sys/dev/usb/controller/xhci_pci.c Tue Nov 13 17:04:44 2012
(r242985)
@@ -101,6 +101,8 @@ xhci_pci_match(device_t self)
case 0x1e318086:
return ("Intel Panther Point USB 3.0 controller");
+ case 0x8c318086:
+ return ("Intel Lynx Point USB 3.0 controller");
default:
break;
@@ -245,6 +247,7 @@ static int
xhci_pci_take_controller(device_t self)
{
struct xhci_softc *sc = device_get_softc(self);
+ uint32_t device_id = pci_get_devid(self);
uint32_t cparams;
uint32_t eecp;
uint32_t eec;
@@ -285,5 +288,13 @@ xhci_pci_take_controller(device_t self)
usb_pause_mtx(NULL, hz / 100); /* wait 10ms */
}
}
+
+ /* On Intel chipsets reroute ports from EHCI to XHCI controller. */
+ if (device_id == 0x1e318086 /* Panther Point */ ||
+ device_id == 0x8c318086 /* Lynx Point */) {
+ uint32_t temp = xhci_get_port_route();
+ pci_write_config(self, PCI_XHCI_INTEL_USB3_PSSEN, temp, 4);
+ pci_write_config(self, PCI_XHCI_INTEL_XUSB2PR, temp, 4);
+ }
return (0);
}
Modified: stable/8/sys/dev/usb/controller/xhcireg.h
==============================================================================
--- stable/8/sys/dev/usb/controller/xhcireg.h Tue Nov 13 17:01:58 2012
(r242984)
+++ stable/8/sys/dev/usb/controller/xhcireg.h Tue Nov 13 17:04:44 2012
(r242985)
@@ -34,6 +34,9 @@
#define PCI_USB_REV_3_0 0x30 /* USB 3.0 */
#define PCI_XHCI_FLADJ 0x61 /* RW frame length adjust */
+#define PCI_XHCI_INTEL_XUSB2PR 0xD0 /* Intel USB2 Port Routing */
+#define PCI_XHCI_INTEL_USB3_PSSEN 0xD8 /* Intel USB3 Port SuperSpeed
Enable */
+
/* XHCI capability registers */
#define XHCI_CAPLENGTH 0x00 /* RO capability */
#define XHCI_RESERVED 0x01 /* Reserved */
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