Author: jhb
Date: Tue Sep 3 21:21:47 2013
New Revision: 255192
URL: http://svnweb.freebsd.org/changeset/base/255192
Log:
Add support for the 'invpcid' instruction to binutils and DDB's
disassembler on amd64.
MFC after: 1 month
Modified:
head/contrib/binutils/gas/config/tc-i386.c
head/contrib/binutils/opcodes/i386-dis.c
head/contrib/binutils/opcodes/i386-opc.tbl
head/contrib/binutils/opcodes/i386-tbl.h
head/sys/amd64/amd64/db_disasm.c
Modified: head/contrib/binutils/gas/config/tc-i386.c
==============================================================================
--- head/contrib/binutils/gas/config/tc-i386.c Tue Sep 3 20:03:10 2013
(r255191)
+++ head/contrib/binutils/gas/config/tc-i386.c Tue Sep 3 21:21:47 2013
(r255192)
@@ -3990,7 +3990,8 @@ output_insn (void)
goto check_prefix;
}
}
- else if (i.tm.base_opcode == 0x660f3880 || i.tm.base_opcode ==
0x660f3881)
+ else if (i.tm.base_opcode == 0x660f3880 || i.tm.base_opcode == 0x660f3881
+ || i.tm.base_opcode == 0x660f3882)
{
/* invept and invvpid are 3 byte instructions with a
mandatory prefix. */
@@ -4040,7 +4041,8 @@ output_insn (void)
*p++ = (i.tm.base_opcode >> 16) & 0xff;
}
else if (i.tm.base_opcode == 0x660f3880 ||
- i.tm.base_opcode == 0x660f3881)
+ i.tm.base_opcode == 0x660f3881 ||
+ i.tm.base_opcode == 0x660f3882)
{
p = frag_more (3);
*p++ = (i.tm.base_opcode >> 16) & 0xff;
Modified: head/contrib/binutils/opcodes/i386-dis.c
==============================================================================
--- head/contrib/binutils/opcodes/i386-dis.c Tue Sep 3 20:03:10 2013
(r255191)
+++ head/contrib/binutils/opcodes/i386-dis.c Tue Sep 3 21:21:47 2013
(r255192)
@@ -550,6 +550,7 @@ fetch_data (struct disassemble_info *inf
#define PREGRP104 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 104 } }
#define PREGRP105 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 105 } }
#define PREGRP106 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 106 } }
+#define PREGRP107 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 107 } }
#define X86_64_0 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 0 } }
@@ -2668,6 +2669,14 @@ static const struct dis386 prefix_user_t
{ "pclmulqdq", { XM, EXx, Ib } },
{ "(bad)", { XX } },
},
+
+ /* PREGRP107 */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "invpcid",{ Gm, Mo } },
+ { "(bad)", { XX } },
+ },
};
static const struct dis386 x86_64_table[][2] = {
@@ -2839,7 +2848,7 @@ static const struct dis386 three_byte_ta
/* 80 */
{ PREGRP98 },
{ PREGRP99 },
- { "(bad)", { XX } },
+ { PREGRP107 },
{ "(bad)", { XX } },
{ "(bad)", { XX } },
{ "(bad)", { XX } },
Modified: head/contrib/binutils/opcodes/i386-opc.tbl
==============================================================================
--- head/contrib/binutils/opcodes/i386-opc.tbl Tue Sep 3 20:03:10 2013
(r255191)
+++ head/contrib/binutils/opcodes/i386-opc.tbl Tue Sep 3 21:21:47 2013
(r255192)
@@ -1498,3 +1498,7 @@ xsetbv, 0, 0xf01, 0xd1, CpuXSAVE, No_bSu
xsave, 1, 0xfae, 0x4, CpuXSAVE, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_xSuf,
{ BaseIndex|Disp8|Disp16|Disp32|Disp32S }
xsaveopt, 1, 0xfae, 0x6, CpuXSAVE,
Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_xSuf, {
BaseIndex|Disp8|Disp16|Disp32|Disp32S }
xrstor, 1, 0xfae, 0x5, CpuXSAVE,
Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_xSuf, {
BaseIndex|Disp8|Disp16|Disp32|Disp32S }
+
+// INVPCID
+invpcid, 2, 0x660f3882, None, CpuNo64,
Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_qSuf|No_xSuf|NoRex64, {
BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg32 }
+invpcid, 2, 0x660f3882, None, Cpu64,
Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_qSuf|No_xSuf|NoRex64, {
BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg64 }
Modified: head/contrib/binutils/opcodes/i386-tbl.h
==============================================================================
--- head/contrib/binutils/opcodes/i386-tbl.h Tue Sep 3 20:03:10 2013
(r255191)
+++ head/contrib/binutils/opcodes/i386-tbl.h Tue Sep 3 21:21:47 2013
(r255192)
@@ -3641,6 +3641,14 @@ const template i386_optab[] =
Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_qSuf|No_xSuf|NoRex64,
{ BaseIndex|Disp8|Disp16|Disp32|Disp32S,
Reg64 } },
+ { "invpcid", 2, 0x660f3882, None, CpuNo64,
+ Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_qSuf|No_xSuf|NoRex64,
+ { BaseIndex|Disp8|Disp16|Disp32|Disp32S,
+ Reg32 } },
+ { "invpcid", 2, 0x660f3882, None, Cpu64,
+ Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_qSuf|No_xSuf|NoRex64,
+ { BaseIndex|Disp8|Disp16|Disp32|Disp32S,
+ Reg64 } },
{ "vmcall", 0, 0xf01, 0xc1, CpuVMX,
No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf|ImmExt,
{ 0 } },
Modified: head/sys/amd64/amd64/db_disasm.c
==============================================================================
--- head/sys/amd64/amd64/db_disasm.c Tue Sep 3 20:03:10 2013
(r255191)
+++ head/sys/amd64/amd64/db_disasm.c Tue Sep 3 21:21:47 2013
(r255192)
@@ -127,7 +127,7 @@ struct finst {
static const struct inst db_inst_0f388x[] = {
/*80*/ { "", TRUE, SDEP, op2(E, Rq), "invept" },
/*81*/ { "", TRUE, SDEP, op2(E, Rq), "invvpid" },
-/*82*/ { "", FALSE, NONE, 0, 0 },
+/*82*/ { "", TRUE, SDEP, op2(E, Rq), "invpcid" },
/*83*/ { "", FALSE, NONE, 0, 0 },
/*84*/ { "", FALSE, NONE, 0, 0 },
/*85*/ { "", FALSE, NONE, 0, 0 },
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