Author: ian
Date: Fri Jul 25 23:36:39 2014
New Revision: 269104
URL: http://svnweb.freebsd.org/changeset/base/269104
Log:
MFC r268401, r268495:
Pending interrupt status is cleared by writing to the ISR, not the data reg.
Use named constant rather than '0' to access the reset controller register.
Modified:
stable/10/sys/arm/freescale/imx/imx51_gpio.c
stable/10/sys/arm/freescale/imx/imx6_mp.c
Directory Properties:
stable/10/ (props changed)
Modified: stable/10/sys/arm/freescale/imx/imx51_gpio.c
==============================================================================
--- stable/10/sys/arm/freescale/imx/imx51_gpio.c Fri Jul 25 23:29:55
2014 (r269103)
+++ stable/10/sys/arm/freescale/imx/imx51_gpio.c Fri Jul 25 23:36:39
2014 (r269104)
@@ -355,7 +355,7 @@ imx51_gpio_intr(void *arg)
sc = arg;
input = READ4(sc, IMX_GPIO_ISR_REG);
value = input & READ4(sc, IMX_GPIO_IMR_REG);
- WRITE4(sc, IMX_GPIO_DR_REG, input);
+ WRITE4(sc, IMX_GPIO_ISR_REG, input);
if (!value)
goto intr_done;
Modified: stable/10/sys/arm/freescale/imx/imx6_mp.c
==============================================================================
--- stable/10/sys/arm/freescale/imx/imx6_mp.c Fri Jul 25 23:29:55 2014
(r269103)
+++ stable/10/sys/arm/freescale/imx/imx6_mp.c Fri Jul 25 23:36:39 2014
(r269104)
@@ -162,7 +162,7 @@ platform_mp_start_ap(void)
( 1 << (SRC_CONTROL_C1RST_SHIFT - 1 + i)));
}
- bus_space_write_4(fdtbus_bs_tag, src, 0, val);
+ bus_space_write_4(fdtbus_bs_tag, src, SRC_CONTROL_REG, val);
armv7_sev();
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