Author: nwhitehorn
Date: Sun Feb 22 20:52:29 2015
New Revision: 279187
URL: https://svnweb.freebsd.org/changeset/base/279187
Log:
Add some opcodes for assembling forthcoming VSX (Vector-Scalar eXtension)
support in the kernel. Userspace programs are expected to rely on LLVM's
integrated assembler or newer binutils.
Modified:
head/contrib/binutils/opcodes/ppc-opc.c
Modified: head/contrib/binutils/opcodes/ppc-opc.c
==============================================================================
--- head/contrib/binutils/opcodes/ppc-opc.c Sun Feb 22 20:16:44 2015
(r279186)
+++ head/contrib/binutils/opcodes/ppc-opc.c Sun Feb 22 20:52:29 2015
(r279187)
@@ -4268,6 +4268,11 @@ const struct powerpc_opcode powerpc_opco
{ "stvx", X(31, 231), X_MASK, PPCVEC, { VS, RA, RB } },
{ "stvxl", X(31, 487), X_MASK, PPCVEC, { VS, RA, RB } },
+/* New VSX opcodes in POWER ISA 2.06 */
+/* XXX: only enough opcodes for FreeBSD kernel, remove and replace with real
info */
+{ "stxvw4x", X(31, 908), X_MASK, PPCVEC, { FRS, RA0, RB } },
+{ "lxvw4x", X(31, 780), X_MASK, PPCVEC, { FRT, RA0, RB } },
+
/* New load/store left/right index vector instructions that are in the Cell
only. */
{ "lvlx", X(31, 519), X_MASK, CELL, { VD, RA0, RB } },
{ "lvlxl", X(31, 775), X_MASK, CELL, { VD, RA0, RB } },
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