Author: adrian
Date: Sun Apr 17 13:46:13 2011
New Revision: 220738
URL: http://svn.freebsd.org/changeset/base/220738
Log:
Mark the PHY as inactive before the chip is reset.
It's also marked inactive by the initvals, and enabled after
the baseband/PLL has been configured, but before the RF
registers have been programmed.
The origin and reason for this particular change is currently unknown.
Obtained from: Linux ath9k
Modified:
head/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c
Modified: head/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c
==============================================================================
--- head/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c Sun Apr 17 11:35:22
2011 (r220737)
+++ head/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c Sun Apr 17 13:46:13
2011 (r220738)
@@ -62,6 +62,7 @@ static HAL_BOOL ar5416SetPowerPerRateTab
uint16_t twiceMaxRegulatoryPower,
uint16_t powerLimit);
static void ar5416Set11nRegs(struct ath_hal *ah, const struct
ieee80211_channel *chan);
+static void ar5416MarkPhyInactive(struct ath_hal *ah);
/*
* Places the device in and out of reset and then places sane
@@ -148,6 +149,9 @@ ar5416Reset(struct ath_hal *ah, HAL_OPMO
if (AR_SREV_MERLIN_20_OR_LATER(ah) && ath_hal_eepromGetFlag(ah,
AR_EEP_OL_PWRCTRL))
tsf = ar5212GetTsf64(ah);
+ /* Mark PHY as inactive; marked active in ar5416InitBB() */
+ ar5416MarkPhyInactive(ah);
+
if (!ar5416ChipReset(ah, chan)) {
HALDEBUG(ah, HAL_DEBUG_ANY, "%s: chip reset failed\n",
__func__);
FAIL(HAL_EIO);
@@ -2493,3 +2497,8 @@ ar5416EepromSetAddac(struct ath_hal *ah,
#undef XPA_LVL_FREQ
}
+static void
+ar5416MarkPhyInactive(struct ath_hal *ah)
+{
+ OS_REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS);
+}
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